AD7476AYRM 查看數據表（PDF） - Analog Devices

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AD7476AYRM

2.35 V to 5.25 V, 1 MSPS, 12-/10-/8-Bit ADCs in 6-Lead SC70

Analog Devices 

AD7476A/AD7477A/AD7478A

Parameter

DC ACCURACY

Resolution

Integral Nonlinearity3

Differential Nonlinearity3

Offset Error3, 4

Gain Error3, 4

Total Unadjusted Error (TUE)3, 4

ANALOG INPUT

Input Voltage Range

DC Leakage Current

Input Capacitance

A Grade2

8

± 0.3

± 0.3

± 0.3

± 0.3

± 0.5

0 to VDD

± 0.5

20

Unit

Bits

LSB max

LSB max

LSB max

LSB max

LSB max

V

µA max

pF typ

LOGIC INPUTS

Input High Voltage, VINH

Input Low Voltage, VINL

Input Current, IIN, SCLK Pin

Input Current, IIN, CS Pin

Input Capacitance, CIN5

LOGIC OUTPUTS

Output High Voltage, VOH

Output Low Voltage, VOL

Floating-State Leakage Current

Floating-State Output Capacitance5

Output Coding

2.4

V min

1.8

V min

0.8

V max

0.4

V max

± 0.5

µA max

± 10

nA typ

5

pF max

VDD – 0.2

0.4

V min

V max

±1

µA max

5

pF max

Straight (Natural) Binary

CONVERSION RATE

Conversion Time

600

Track-and-Hold Acquisition Time3

225

Throughput Rate

1.2

ns max

ns max

MSPS max

POWER REQUIREMENTS

VDD

IDD

Normal Mode (Static)

Normal Mode (Operational)

Full Power-Down Mode (Static)

Full Power-Down Mode (Dynamic)

Power Dissipation6

Normal Mode (Operational)

Full Power-Down Mode

2.35/5.25

2.5

1.2

3.5

1.7

1

0.6

0.3

17.5

5.1

5

V min/max

mA typ

mA typ

mA max

mA max

µA max

mA typ

mA typ

mW max

mW max

µW max

NOTES

1Temperature range from –40°C to +85°C.

2Operational from VDD = 2.0 V, with input high voltage (VINH) 1.8 V min.

3See Terminology section.

4SC70 values guaranteed by characterization.

5Guaranteed by characterization.

6See Power vs. Throughput Rate section.

Specifications subject to change without notice.

Test Conditions/Comments

Guaranteed No Missed Codes to Eight Bits

Track-and-Hold in Track; 6 pF typ when

in Hold

VDD = 2.35 V

VDD = 5 V

VDD = 3 V

Typically 10 nA, VIN = 0 V or VDD

ISOURCE = 200 µA, VDD = 2.35 V to 5.25 V

ISINK = 200 µA

12 SCLK Cycles with SCLK at 20 MHz

Digital I/Ps = 0 V or VDD

VDD = 4.75 V to 5.25 V, SCLK ON or OFF

VDD = 2.35 V to 3.6 V, SCLK ON or OFF

VDD = 4.75 V to 5.25 V

VDD = 2.35 V to 3.6 V

Typically 50 nA

VDD = 5 V, fSAMPLE = 100 kSPS

VDD = 3 V, fSAMPLE = 100 kSPS

VDD = 5 V

VDD = 3 V

VDD = 5 V

REV. C

–5–

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