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AD7538 查看數據表(PDF) - Analog Devices

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AD7538 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
AD7538
BIPOLAR OPERATION (4-QUADRANT
MULTIPLICATION)
The recommended circuit diagram for bipolar operation is
shown in Figure 8. Offset binary coding is used. The code table
for Figure 8 is given in Table 7.
With the DAC loaded to 10 0000 0000 0000, adjust R1 for VO =
0 V. Alternatively, one can omit R1 and R2 and adjust the ratio
of R5 and R6 for VO = 0 V. Full-scale trimming can be accom-
plished by adjusting the amplitude of VIN or by varying the
value of R7.
The values given for R1, R2 are the minimum necessary to
calibrate the system for Resistors R5, R6, R7 ratio matched to
0.1%. System linearity error is independent of resistor ratio
matching and is affected by DAC linearity error only.
When operating over a wide temperature range, it is important
that the resistors be of the same type so that their temperature
coefficients match.
LOW LEAKAGE CONFIGURATION
For CMOS multiplying DAC, as the device is operated at higher
temperatures, the output leakage current increases. For a 14-bit
resolution system, this can be a significant source of error. The
AD7538 features a leakage reduction configuration to keep the
leakage current low over an extended temperature range. One
may operate the device with or without this configuration. If VSS
(Pin 24) is tied to AGND then the DAC exhibits normal output
leakage currents at high temperatures. To use the low leakage
facility, VSS should be tied to a voltage of approximately −0.3 V
as in Figure 6 and Figure 8. A simple resistor divider (R3, R4)
produces approximately −300 mV from −15 V. The C2
capacitor in parallel with R3 is an integral part of the low
leakage configuration and must be 4.7 μF or greater. Figure 7
is a plot of leakage current vs. temperature for both conditions.
It clearly shows the improvement gained by using the low
leakage configuration.
Table 7. Bipolar Code Table for the Offset Binary Circuit
of Figure 8
Binary Number In
DAC Register
MSB
LSB
11 1111 1111 1111
10 0000 0000 0001
10 0000 0000 0000
01 1111 1111 1111
00 0000 0000 0000
Analog Output VOUT
+VIN(8191/8192)
+VIN(1/8192)
0V
−VIN(1/8192)
VIN(8191/8192)
VDD = 15V
60
VREF = 10V
50
40
30
20
10
0
VSS = 0V
VSS = –0.3V
30 40 50 60 70 80 90 100 110 120
TEMPERATURE (°C)
Figure 7. Graph of Typical Leakage Current vs. Temperature for AD7538
VIN
R1
VDD
50
R2
22
R6
20k
LDAC
CS
WR
1
VREF
20 LDAC
21 CS
22 WR
23
VDD
2
RFB
AD7538
IOUT 3
AGND 4
C1
33pF
R5
10k
A1
AD711
DB13 TO DB0 DGND VSS
6
19
5
24
DIGITAL
INPUT DATA GND
C2
4.7µF
+
R3
1k
R4
47k
R8
5k, 10%
ANALOG
GND
–15V
Figure 8. Bipolar Operation
R7
20k
A2
AD711
VO
Rev. B | Page 11 of 16

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