AD7655ACP 查看數據表（PDF） - Analog Devices
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AD7655ACP Datasheet PDF : 28 Pages
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ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Values
Analog Input
INAx1, INBx1, REFx, INxN, REFGND
AVDD + 0.3 V to
AGND − 0.3 V
Ground Voltage Differences
AGND, DGND, OGND
Supply Voltages
AVDD, DVDD, OVDD
AVDD to DVDD, AVDD to OVDD
DVDD to OVDD
±0.3 V
–0.3 V to +7 V
±7 V
−0.3 V to +7 V
Digital Inputs
Internal Power Dissipation2
Internal Power Dissipation3
Junction Temperature
Storage Temperature Range
Lead Temperature Range
(Soldering 10 sec)
−0.3 V to DVDD + 0.3 V
700 mW
2.5 W
150°C
−65°C to +150°C
300°C
1 See the Analog Inputs section.
2 Specification is for device in free air: 48-lead LQFP, θJA = 91°C/W,
θJC = 30°C/W.
3 Specification is for device in free air: 48-lead LFCSP, θJA = 26°C/W.
AD7655
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
1.6mA IOL
TO OUTPUT
PIN CL
60pF*
1.4V
500μA IOH
*IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
CL OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
Figure 2. Load Circuit for Digital Interface Timing
0.8V
tDELAY
2V
0.8V
2V
tDELAY
2V
0.8V
Figure 3. Voltage Reference Levels for Timing
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product
features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to
high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid
performance degradation or loss of functionality.
Rev. B | Page 7 of 28
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