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AD76881 查看數據表(PDF) - Analog Devices

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AD76881 Datasheet PDF : 28 Pages
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AD7986
CS MODE, 3-WIRE WITH BUSY INDICATOR
This mode is usually used when a single AD7986 is connected
to an SPI-compatible digital host having an interrupt input.
It is only available in normal conversion mode (TURBO = low).
The connection diagram is shown in Figure 27, and the
corresponding timing is given in Figure 28.
With SDI tied to VIO, a rising edge on CNV initiates a conversion,
selects the CS mode, and forces SDO to high impedance. SDO
is maintained in high impedance until the completion of the
conversion irrespective of the state of CNV. Prior to the minimum
conversion time, CNV can be used to select other SPI devices,
such as analog multiplexers, but CNV must be returned low
before the minimum conversion time elapses and then held low
for the maximum possible conversion time to guarantee the
generation of the busy signal indicator.
When the conversion is complete, SDO goes from high imped-
ance to low impedance. With a pull-up on the SDO line, this
transition can be used as an interrupt signal to initiate the data
reading controlled by the digital host. The AD7986 then enters
the acquisition phase and powers down. The data bits are then
clocked out, MSB first, by subsequent SCK falling edges. The
data is valid on both SCK edges. Although the rising edge can
be used to capture the data, a digital host using the SCK falling
edge allows a faster reading rate, provided that it has an acceptable
hold time. After the optional 19th SCK falling edge, SDO returns
to high impedance.
If multiple AD7986 devices are selected at the same time, the
SDO output pin handles this contention without damage or
induced latch-up. Meanwhile, it is recommended to keep this
contention as short as possible to limit extra power dissipation.
VIO
SDI
CNV
AD7986
SDO
CONVERT
VIO
DIGITAL HOST
47k
DATA IN
IRQ
SCK TURBO
CLK
Figure 27. CS Mode, 3-Wire with Busy Indicator Connection Diagram (SDI High)
TURBO = 0
SDI = 1
tCNVH
CNV
ACQUISITION
SCK
SDO
tCYC
tCONV
CONVERSION
tACQ
ACQUISITION
tSCKL
tSCK
1
2
tHSDO
3
17
18
tDSDO
tSCKH
D17
D16
D1
(QUIET
TIME)
tQUIET
19
tDIS
D0
Figure 28. CS Mode, 3-Wire with Busy Indicator Serial Interface Timing (SDI High)
Rev. B | Page 20 of 28

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