EVAL-AD7694CB 查看數據表（PDF） - Analog Devices
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EVAL-AD7694CB Datasheet PDF : 16 Pages
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TIMING SPECIFICATIONS
VDD = 4.75 V to 5.25 V; TA = −40°C to +85°C, unless otherwise stated.
Table 4.
Parameter
Conversion Time: CNV Rising Edge to Data Available
Time Between Conversions
SCK Period
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
CNV Low to SDO, D15 MSB Valid
CNV High to SDO High Impedance
VDD = 2.7 V to 4.75 V; TA = −40°C to +85°C, unless otherwise stated.
Table 5.
Parameter
Conversion Time: CNV Rising Edge to Data Available
Time Between Conversions
SCK Period
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
CNV Low to SDO, D15 MSB Valid
CNV High to SDO High Impedance
AD7694
Symbol
tCONV
tCYC
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
tEN
tDIS
Min
4
50
20
20
5
Typ Max
3.2
20
60
60
Unit
μs
μs
ns
ns
ns
ns
ns
ns
ns
Symbol
tCONV
tCYC
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
tEN
tDIS
Min
6.66
125
50
50
5
Typ Max
4.66
50
120
120
Unit
μs
μs
ns
ns
ns
ns
ns
ns
ns
Rev. A | Page 5 of 16
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