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AD7765(Rev0) 查看數據表(PDF) - Analog Devices

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AD7765 Datasheet PDF : 32 Pages
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AD7765
Parameter
Normal Power Mode
AIDD1 (Modulator)
AIDD2 (General)5
AIDD3 (Differential Amplifier)
AIDD4 (Reference Buffer)
DIDD5
Low Power Mode
AIDD1 (Modulator)
AIDD2 (General)5
AIDD3 (Differential Amplifier)
AIDD4 (Reference Buffer)
DIDD5
POWER DISSIPATION
Normal Power Mode
Low Power Mode
Power-Down Mode6
Test Conditions/Comments
MCLK = 40 MHz
AVDD3 = 5 V
AVDD4 = 5 V
MCLK = 40 MHz
MCLK = 40 MHz
AVDD3 = 5 V
AVDD4 = 5 V
MCLK = 40 MHz
MCLK = 40 MHz, decimate 128×
MCLK = 40 MHz, decimate 128×
PWRDWN held logic low
Specification
19
13
10
9
37
10
7
5.5
5
20
300
371
160
215
1
1 See Terminology section.
2 SNR specifications in decibels are referred to a full-scale input, FS. Tested with an input signal at 0.5dB below full scale, unless otherwise specified.
3 Output Data Rate (ODR) = [(MCLK/2)]/Decimation Rate. That is, the maximum ODR for AD7765 = [(40 MHz)/2)/128] = 156.25 kHz.
4 Tested with a 400 μA load current.
5 Tested at MCLK = 40 MHz. This current scales linearly with MCLK frequency applied.
6 Tested at 125°C.
Unit
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mA typ
mW typ
mW max
mW typ
mW max
mW typ
Rev. 0 | Page 5 of 32

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