EVAL-AD7887CB 查看數據表（PDF） - Analog Devices
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EVAL-AD7887CB
Analog Devices
EVAL-AD7887CB Datasheet PDF : 24 Pages
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AD7887
CONTROL REGISTER
The control register on the AD7887 is an 8-bit, write-only register. Data is loaded from the DIN pin of the AD7887 on the rising edge of
SCLK. The data is transferred on the DIN line at the same time as the conversion result is read from the part. This requires 16 serial
clocks for every data transfer. Only the information provided on the first eight rising clock edges after CS falling edge is loaded to the
control register. MSB denotes the first bit in the data stream. The bit functions are outlined in Table 5. The contents of the control register
on power up is all 0s.
MSB
DONTC
ZERO
REF
SIN/DUAL
CH
ZERO
PM1
PM0
Table 5. Control Register
Bit
Mnemonic
7
DONTC
6
ZERO
5
REF
4
SIN/DUAL
3
CH
2
ZERO
1, 0
PM1, PM0
Comment
Don’t Care. The value written to this bit of the control register is a don’t care, that is, it doesn’t matter if the bit
is 0 or 1.
A zero must be written to this bit to ensure correct operation of the AD7887.
Reference Bit. With a 0 in this bit, the on-chip reference is enabled. With a 1 in this bit, the on-chip reference is
disabled.
Single/Dual Bit. This bit determines whether the AD7887 operates in single-channel or dual-channel mode. A
0 in this bit selects single-channel operation and the AIN1/VREF pin assumes its VREF function. A 1 in this bit selects
dual-channel mode, with the reference voltage for the ADC internally connected to VDD and the AIN1/VREF pin
assuming its AIN1 function as the second analog input channel. To obtain best performance from the AD7887,
the internal reference should be disabled when operating in the dual-channel mode, that is, REF = 1.
Channel Bit. When the part is selected for dual-channel mode, this bit determines which channel is converted
for the next conversion. A 0 in this bit selects the AIN0 input, and a 1 in this bit selects the AIN1 input. In single-
channel mode, this bit should always be 0.
A 0 must be written to this bit to ensure correct operation of the AD7887.
Power Management Bits. These two bits decode the mode of operation of the AD7887 as described in Table 6.
Table 6. Power Management Options
PM1
PM0
Mode
0
0
Mode 1. In this mode, the AD7887 enters shutdown if the CS input is 1 and is in full power mode when CS is 0.
Thus the part comes out of shutdown on the falling edge of CS and enters shutdown on the rising edge of CS.
0
1
Mode 2. In this mode, the AD7887 is always fully powered up, regardless of the status of any of the logic inputs.
1
0
Mode 3. In this mode, the AD7887 automatically enters shutdown mode at the end of each conversion,
regardless of the state of CS.
1
1
Mode 4. In this standby mode, portions of the AD7887 are powered down but the on-chip reference voltage
remains powered up. This mode is similar to Mode 3, but allows the part to power up much faster. The REF bit
should be 0 to ensure that the on-chip reference is enabled.
Rev. D | Page 10 of 24
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