EVAL-AD7887CB 查看數據表（PDF） - Analog Devices

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EVAL-AD7887CB

2.7 V to 5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead MSOP

Analog Devices 

2.7 V to 5.25 V, Micropower, 2-Channel,

125 kSPS, 12-Bit ADC in 8-Lead MSOP

AD7887

FEATURES

Specified for VDD of 2.7 V to 5.25 V

Flexible power/throughput rate management

Shutdown mode: 1 μA max

One or two single-ended inputs

Serial interface: SPI®/QSPI™/MICROWIRE™/DSP compatible

8-lead narrow SOIC and MSOP packages

APPLICATIONS

Battery-powered systems (personal digital assistants,

medical instruments, mobile communications)

Instrumentation and control systems

High speed modems

FUNCTIONAL BLOCK DIAGRAM

AIN0

AIN1/

VREF

VDD

I/P

MUX

T/H

AD7887

AIN1/VREF

SOFTWARE

CONTROL

LATCH

2.5V

REF

BUF

CHARGE

REDISTRIBUTION

DAC

COMP

GND

SAR + ADC

CONTROL LOGIC

GENERAL DESCRIPTION

The AD7887 is a high speed, low power, 12-bit analog-to-digital

converter (ADC) that operates from a single 2.7 V to 5.25 V

power supply. The AD7887 is capable of 125 kSPS throughput

rate. The input track-and-hold acquires a signal in 500 ns and

features a single-ended sampling scheme. The output coding for

the AD7887 is straight binary, and the part is capable of

converting full power signals of up to 2.5 MHz.

The AD7887 can be configured for either dual- or single-channel

operation via the on-chip control register. There is a default

single-channel mode that allows the AD7887 to be operated as a

read-only ADC. In single-channel operation, there is one

analog input (AIN0) and the AIN1/VREF pin assumes its VREF

function. This VREF pin allows the user access to the part’s

internal 2.5 V reference, or the VREF pin can be overdriven by an

external reference to provide the reference voltage for the part.

This external reference voltage has a range of 2.5 V to VDD. The

analog input range on AIN0 is 0 to VREF.

In dual-channel operation, the AIN1/VREF pin assumes its AIN1

function, providing a second analog input channel. In this case,

the reference voltage for the part is provided via the VDD pin. As

SPORT

DIN

CS DOUT SCLK

Figure 1.

a result, the input voltage range on both the AIN0 and AIN1

inputs is 0 to VDD.

CMOS construction ensures low power dissipation of typically

2 mW for normal operation and 3 μW in power-down mode.

The part is available in an 8-lead, 0.15-inch-wide narrow body

SOIC and an 8-lead MSOP package.

PRODUCT HIGHLIGHTS

1. Smallest 12-bit dual-/single-channel ADC; 8-lead MSOP

package.

2. Lowest power 12-bit dual-/single-channel ADC.

3. Flexible power management options, including automatic

power-down after conversion.

4. Read-only ADC capability.

5. Analog input range from 0 V to VREF.

6. Versatile serial input/output port (SPI/QSPI/MICROWIRE/

DSP compatible).

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

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Fax: 781.461.3113

©2009 Analog Devices, Inc. All rights reserved.

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