AD797BN 查看數據表（PDF） - Analog Devices
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AD797BN Datasheet PDF : 16 Pages
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AD797
20–120pF
100 Ω
R1
+VS
**
IIN
2
7
AD797 6
3
4
**
CS*
RS*
–VS
VOUT
600Ω
* SEE TEXT
** USE POWER SUPPLY BYPASSING SHOWN IN FIGURE 32.
Figure 36. I-to-V Converter Connection
greater than 33 pF a 100 Ω series resistor is required. A by-
passed balancing resistor (RS and CS) can be included to mini-
mize dc errors.
THE INVERTING CONFIGURATION
The inverting configuration (Figure 37) presents a low input
impedance, R1, to the source. For this reason, the goals of both
low noise and input buffering are at odds with one another.
Nonetheless, the excellent dynamics of the AD797 will make it
the preferred choice in many inverting applications, and with care-
ful selection of feedback resistors the noise penalties will be mini-
mal. Some examples are presented in Table II and Figure 37.
CL
R2
R1
VIN
RS*
+VS
**
2
7
AD797 6
3
4
**
–VS
VOUT
RL
* SEE TEXT
** USE POWER SUPPLY BYPASSING SHOWN IN FIGURE 32.
Figure 37. Inverting Amplifier Connection
Gain
–1
–1
–10
Table III. Values for Inverting Circuit
R1
1 kΩ
300 Ω
150 Ω
R2
1 kΩ
300 Ω
1500 Ω
CL
≈20 pF
≈10 pF
≈5 pF
Noise
(Excluding rS)
3.0 nV/√Hz
1.8 nV/√Hz
1.8 nV/√Hz
DRIVING CAPACITIVE LOADS
The capacitive load driving capabilities of the AD797 are dis-
played in Figure 38. At gains over 10 usually no special precau-
tions are necessary. If more drive is desirable the circuit in
Figure 39 should be used. Here a 5000 pF load can be driven
cleanly at any noise gain ≥ 2.
100nF
10nF
1nF
100pF
10pF
1pF
1
10
100
1k
CLOSED-LOOP GAIN
Figure 38. Capacitive Load Drive Capability vs. Closed
Loop Gain
20pF
1k Ω
200pF
100 Ω
+VS
**
1k Ω
2
7
VIN
33Ω
AD797 6
3
4
**
VOUT
C1
–VS
** USE POWER SUPPLY BYPASSING SHOWN IN FIGURE 32.
Figure 39. Recommended Circuit for Driving a High
Capacitance Load
SETTLING TIME
The AD797 is unique among ultralow noise amplifiers in that it
settles to 16 bits (<150 µV) in less than 800 ns. Measuring this
performance presents a challenge. A special test setup (Figure
40) was developed for this purpose. The input signal was ob-
tained from a resonant reed switch pulse generator, available
from Tektronix as calibration Fixture No. 067-0608-00. When
open, the switch is simply 50 Ω to ground and settling is purely
a passive pulse decay and inherently flat. The low repetition rate
signal was captured on a digital oscilloscope after being ampli-
fied and clamped twice. The selection of plug-in for the oscillo-
scope was made for minimum overload recovery.
REV. C
–11–
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