AD797BN 查看數據表（PDF） - Analog Devices
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AD797BN Datasheet PDF : 16 Pages
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AD797
THEORY OF OPERATION
The new architecture of the AD797 was developed to overcome
inherent limitations in previous amplifier designs. Previous pre-
cision amplifiers used three stages to ensure high open-loop
gain, Figure 27b, at the expense of additional frequency com-
pensation components. Slew rate and settling performance are
usually compromised, and dynamic performance is not ad-
equate beyond audio frequencies. As can be seen in Figure 27b,
the first stage gain is rolled off at high frequencies by the com-
pensation network. Second stage noise and distortion will then
appear at the input and degrade performance. The AD797 on
the other hand, uses a single ultrahigh gain stage to achieve dc
as well as dynamic precision. As shown in the simplified sche-
matic (Figure 28), nodes A, B, and C all track in voltage forcing
the operating points of all pairs of devices in the signal path to
match. By exploiting the inherent matching of devices fabricated
on the same IC chip, high open-loop gain, CMRR, PSRR, and
low VOS are all guaranteed by pairwise device matching (i.e.,
NPN to NPN & PNP to PNP), and not absolute parameters
such as beta and early voltage.
gm
R1
BUFFER
C1
VOUT
RL
GAIN = gmR1 ≈ 5 x 10 6
a.
C2
gm
A2
A3
BUFFER
VOUT
R1
C1
RL
R2
GAIN = gmR1 *A2 *A3
b.
Figure 27. Model of AD797 vs. That of a Typical
Three-Stage Amplifier
VCC
R2
R3
CN
R1
I5
Q4
Q3
Q7
Q10
A
B
+IN
–IN
Q1 Q2
Q5
Q12 Q8
Q6
CC
OUT
Q9
Q11
C
I1
I7
I6
I4
VSS
Figure 28. AD797 Simplified Schematic
This matching benefits not just dc precision but since it holds
up dynamically, both distortion and settling time are also
reduced. This single stage has a voltage gain of >5 × 106 and
VOS <80 µV, while at the same time providing THD + noise of
less than –120 dB and true 16 bit settling in less than 800 ns.
The elimination of second stage noise effects has the additional
benefit of making the low noise of the AD797 (<0.9 nV/√Hz)
extend to beyond 1 MHz. This means new levels of perfor-
mance for sampled data and imaging systems. All of this perfor-
mance as well as load drive in excess of 30 mA are made
possible by Analog Devices’ advanced Complementary Bipolar
(CB) process.
Another unique feature of this circuit is that the addition of a
single capacitor, CN (Figure 28), enables cancellation of distor-
tion due to the output stage. This can best be explained by
referring to a simplified representation of the AD797 using ide-
alized blocks for the different circuit elements (Figure 29).
A single equation yields the open-loop transfer function of this
amplifier, solving it (at Node B) yields:
VO =
gm
VIN
CN
A
jω – CN
jω – CC
A
jω
gm = the transconductance of Q1 and Q2
A = the gain of the output stage, (~1)
VO = voltage at the output
VIN = differential input voltage
When CN is equal to CC this gives the ideal single pole op amp
response:
VO
VIN
=
gm
jωC
The terms in A, which include the properties of the output
stage such as output impedance and distortion, cancel by
simple subtraction, and therefore the distortion cancellation
does not affect the stability or frequency response of the ampli-
fier. With only 500 µA of output stage bias the AD797 delivers
a 1 kHz sine wave into 600 Ω at 7 V rms with only 1 ppm of
distortion.
I1
I2
CN
A
B
OUT
A
+IN
–IN
CURRENT
CC
Q1 Q2
MIRROR
1
I3
C
I4
Figure 29. AD797 Block Diagram
–8–
REV. C
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