AD7992BRMZ-1 查看數據表（PDF） - Analog Devices
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AD7992BRMZ-1 Datasheet PDF : 28 Pages
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AD7992
I2C TIMING SPECIFICATIONS
Guaranteed by initial characterization. All values measured with the input filtering enabled. CB refers to the capacitive load on the bus
line. tr and tf measured between 0.3 VDD and 0.7 VDD.
High speed mode timing specifications apply to the AD7992-1 only. Standard and fast mode timing specifications apply to both the
AD7992-0 and the AD7992-1. See Figure 2. Unless otherwise noted, VDD = 2.7 V to 5.5 V; REFIN = 2.5 V to VDD; TA =TMIN to TMAX.
Table 3.
Parameter
fSCL
t1
t2
t3
t41
t5
t6
t7
t8
t9
Conditions
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High Speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High Speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Limit at TMIN, TMAX
Min
Max
Unit Description
100
kHz Serial clock frequency
400
kHz
3.4
MHz
1.7
MHz
4
µs
tHIGH, SCL high time
0.6
µs
60
ns
120
ns
4.7
µs
tLOW, SCL low time
1.3
µs
160
ns
320
ns
250
ns
tSU;DAT, data setup time
100
ns
10
ns
0
3.45
µs
tHD;DAT, data hold time
0
0.9
µs
0
0
4.7
0.6
160
4
0.6
160
4.7
1.3
4
0.6
160
20 + 0.1 CB
702
150
1000
300
ns
ns
µs
tSU;STA, setup time for a repeated START condition
µs
ns
µs
tHD;STA, hold time for a repeated START condition
µs
ns
µs
tBUF, bus free time between a STOP and a START condition
µs
µs
tSU;STO, setup time for STOP condition
µs
ns
ns
tRDA, rise time of SDA signal
ns
10
80
ns
20
160
ns
Rev. 0 | Page 5 of 28
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