AD8222-EVAL 查看數據表（PDF） - Analog Devices
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AD8222-EVAL Datasheet PDF : 24 Pages
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AD8222
15
10
SETTLED TO 0.001%
SETTLED TO 0.01%
5
0
0
5
10
15
20
OUTPUT VOLTAGE STEP SIZE (V)
Figure 39. Settling Time vs. Step Size (G = 1)
1k
100
SETTLED TO 0.001%
10
SETTLED TO 0.01%
1
1
10
100
1k
GAIN
Figure 40. Settling Time vs. Gain for a 10 V Step
200
SOURCE
VOUT = 20V p-p
180
GAIN = 1000
160
THERMAL CROSSTALK
140
VARIES WITH LOAD
SOURCE VOUT
SMALLER TO
AVOID SLEW
RATE LIMIT
120
GAIN = 1
100
80
60
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 41. Channel Separation vs. Frequency, RL = 2 kΩ, Source Channel at G = 1
60
GAIN = 1000
40
GAIN = 100
20
GAIN = 10
0
GAIN = 1
–20
–40
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 42. Differential Output Configuration: Gain vs. Frequency
100
90
CMROUT
=
20
log
VDIFF_OUT
VCM_OUT
80
70
LIMITED BY
MEASUREMENT
60
SYSTEM
50
40
30
20
10
0
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 43. Differential Output Configuration:
Common-Mode Output vs. Frequency
Rev. 0 | Page 14 of 24
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