AD8228 查看數據表（PDF） - Analog Devices
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AD8228 Datasheet PDF : 24 Pages
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TYPICAL PERFORMANCE CHARACTERISTICS
T = 25°C, VS = ±15 V, RL = 10 kΩ, unless otherwise noted.
MEAN: –5.5
70
SD: 12.4
60
50
40
30
20
10
0
–100
–50
0
50
100
G10 SYSTEM VOS RTI @ 15V (µV)
Figure 3. Typical Distribution of Input Offset Voltage (G = 10)
60
MEAN: –0.079
SD: 0.27
50
40
30
20
10
0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
G10 SYSTEM VOS DRIFT RTI (µV)
Figure 4. Typical Distribution of Input Offset Voltage Drift (G = 10)
AD8228
100
MEAN: 0.20
SD: 0.12
80
60
40
20
0
–1.0
–0.5
0
0.5
1.0
1.5
G100 SYSTEM VOS DRIFT RTI (µV)
Figure 6. Typical Distribution of Input Offset Voltage Drift (G = 100)
100
MEAN: 0.29
SD: 0.27
80
60
40
20
0
–3
–2
–1
0
1
2
3
CMRR G100 RTI (µV/V)
Figure 7. Typical Distribution for CMR (G = 100)
MEAN: 7.1
SD: 10.1
80
60
40
20
0
–100
–50
0
50
100
G100 SYSTEM VOS RTI @ 15V (µV)
Figure 5. Typical Distribution of Input Offset Voltage (G = 100)
MEAN: 0.42
120
SD: 0.08
100
80
60
40
20
0
–0.5
0
0.5
1.0
1.5
NEG IBIAS CURRENTS ±15V (nA)
Figure 8. Typical Distribution of Input Bias Current
Rev. 0 | Page 9 of 24
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