AD9252(Rev0) 查看數據表（PDF） - Analog Devices
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AD9252 Datasheet PDF : 52 Pages
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AD9252
SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.
Table 1.
Parameter1
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Offset Matching
Gain Error
Gain Matching
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
TEMPERATURE DRIFT
Offset Error
Gain Error
Reference Voltage (1 V Mode)
REFERENCE
Output Voltage Error (VREF = 1 V)
Load Regulation @ 1.0 mA (VREF = 1 V)
Input Resistance
ANALOG INPUTS
Differential Input Voltage Range (VREF = 1 V)
Common-Mode Voltage
Differential Input Capacitance
Analog Bandwidth, Full Power
POWER SUPPLY
AVDD
DRVDD
IAVDD
IDRVDD
Total Power Dissipation (Including Output Drivers)
Power-Down Dissipation
Standby Dissipation2
CROSSTALK
CROSSTALK (Overrange Condition)3
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
AD9252-50
Min Typ
Max
Unit
14
Bits
Guaranteed
±1
±8
±3
±8
±1.5
±2.5
±0.3
±0.7
±0.4
±1
±1.5
±4
mV
mV
% FS
% FS
LSB
LSB
±2
ppm/°C
±17
ppm/°C
±21
ppm/°C
±2
±30
mV
3
mV
6
kΩ
2
AVDD/2
7
325
V p-p
V
pF
MHz
1.7 1.8
1.7 1.8
360
55.5
748
2
89
−90
−90
1.9
V
1.9
V
373.4 mA
58
mA
773
mW
11
mW
mW
dB
dB
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed.
2 Can be controlled via SPI.
3 Overrange condition is specific with 6 dB of the full-scale input range.
Rev. 0 | Page 3 of 52
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