AD9397 查看數據表（PDF） - Analog Devices
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AD9397 Datasheet PDF : 28 Pages
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD9397
GND 1
GREEN 7 2
GREEN 6 3
GREEN 5 4
GREEN 4 5
GREEN 3 6
GREEN 2 7
GREEN 1 8
GREEN 0 9
VDD 10
GND 11
BLUE 7 12
BLUE 6 13
BLUE 5 14
BLUE 4 15
BLUE 3 16
BLUE 2 17
BLUE 1 18
BLUE 0 19
NC 20
NC 21
NC 22
NC 23
CTL3 24
CTL2 25
PIN 1
AD9397
TOP VIEW
(Not to Scale)
75 GND
74 NC
73 NC
72 VD
71 NC
70 NC
69 GND
68 NC
67 VD
66 NC
65 GND
64 NC
63 NC
62 NC
61 NC
60 NC
59 PVDD
58 GND
57 NC
56 PVDD
55 GND
54 PVDD
53 GND
52 MDA
51 MCL
NC = NO CONNECT
Table 5. Complete Pinout List
Pin Type
INPUTS
DIGITAL VIDEO DATA INPUTS
DIGITAL VIDEO CLOCK INPUTS
OUTPUTS
Pin No.
81
35
34
38
37
41
40
43
44
92 to 99
2 to 9
12 to 19
89
87
85
84
27, 26, 25, 24
Figure 2. Pin Configuration
Mnemonic
PWRDN
Rx0+
Rx0−
Rx1+
Rx1−
Rx2+
Rx2−
RxC+
RxC−
RED [7:0]
GREEN [7:0]
BLUE [7:0]
DATACK
HSOUT
VSOUT
O/E FIELD
CTL(0 to 3)
Function
Power-Down Control
Digital Input Channel 0 True
Digital Input Channel 0 Complement
Digital Input Channel 1 True
Digital Input Channel 1 Complement
Digital Input Channel 2 True
Digital Input Channel 2 Complement
Digital Data Clock True
Digital Data Clock Complement
Outputs of Red Converter, Bit 7 is MSB
Outputs of Green Converter, Bit 7 is MSB
Outputs of Blue Converter, Bit 7 is MSB
Data Output Clock
HSYNC Output Clock (Phase-Aligned with DATACK)
VSYNC Output Clock (Phase-Aligned with DATACK)
Odd/Even Field Output
Control 0, 1, 2, 3
Value
3.3 V CMOS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
Rev. 0 | Page 7 of 28
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