AD9674 查看數據表（PDF） - Analog Devices

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AD9674

Octal Ultrasound Analog Front End

Analog Devices 

AD9674

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Functional Block Diagram .............................................................. 3

Specifications..................................................................................... 4

AC Specifications.......................................................................... 4

Digital Specifications ................................................................... 7

Switching Specifications .............................................................. 8

ADC Timing Diagram ................................................................. 9

CW Doppler Timing Diagram ................................................... 9

Absolute Maximum Ratings.......................................................... 11

Thermal Impedance ................................................................... 11

ESD Caution................................................................................ 11

Pin Configuration and Function Descriptions........................... 12

Typical Performance Characteristics ........................................... 15

TGC Mode................................................................................... 15

CW Doppler Mode..................................................................... 19

Theory of Operation ...................................................................... 20

TGC Operation........................................................................... 20

REVISION HISTORY

1/16—Revision A: Initial Version

Data Sheet

Analog Test Signal Generation ................................................. 31

CW Doppler Operation............................................................. 32

Digital RF Decimator..................................................................... 33

Vector Profile .............................................................................. 33

RF Decimator.............................................................................. 34

Digital Test Waveforms.............................................................. 34

Digital block Power Saving scheme ......................................... 35

Serial Port Interface (SPI)................................................................ 36

Hardware Interface..................................................................... 36

Memory Map .................................................................................. 38

Reading the Memory Map Table .............................................. 38

Reserved Locations .................................................................... 38

Default Values ............................................................................. 38

Logic Levels................................................................................. 38

Recommended Start-Up Sequence .......................................... 38

Memory Map Register Descriptions........................................ 46

Outline Dimensions ....................................................................... 47

Ordering Guide .......................................................................... 47

Rev. A | Page 2 of 47

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