AD9717(RevB) 查看數據表（PDF） - Analog Devices

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AD9717
(Rev.:RevB)

Dual, Low Power, 8-/10-/12-/14-Bit TxDAC Digital-to-Analog Converters

Analog Devices 

Data Sheet

REVISION HISTORY

1/2018—Rev. A to Rev. B

Changes to Figure 94 ......................................................................41

Changes to Estimating the Overall DAC Pipeline Section ........42

Changes to Ordering Guide...........................................................79

3/2009—Rev. 0 to Rev. A

Changes to Figure 1...........................................................................4

Changed DVDD = 3.3 V to DVDD = 1.8 V,

Table 1 Conditions ............................................................................5

Changes to Table 1 ............................................................................5

Changed DVDD = 3.3 V to DVDD = 1.8 V,

Table 2 Conditions ............................................................................7

Changed DVDD = 3.3 V to DVDD = 1.8 V, and DVDDIO = 1.8 V

to DVDDIO = 3.3 V, Table 3 Conditions .......................................8

Changed DVDD = 3.3 V to DVDD = 1.8 V, CVDD = 3.3 V to

CVDD = 1.8 V, Table 4 Conditions.................................................8

Changes to Table 5 and Table 6 .......................................................9

Changes to Figure 2 and Table 7 ...................................................10

Changes to Figure 3 and Table 8 ...................................................12

Changes to Figure 4 and Table 9 ...................................................14

Changes to Table 10 ........................................................................16

Changes to Typical Performance Characteristics Section .........18

Changes to Figure 84 and Theory of Operation Section ...........32

Added Figure 85 to Figure 88; Renumbered Sequentially .........34

Changes to Pin Mode Section........................................................35

AD9714/AD9715/AD9716/AD9717

Changes to Table 13 ........................................................................36

Changes to Table 14 ........................................................................37

Changes to Digital Interface Operation Section and Figure 89 to

Figure 93...........................................................................................40

Changes to Digital Data Latching and Retimer Block Section,

Figure 94, and Retimer Section .....................................................41

Changes to Estimating the Overall DAC Pipeline Delay

Section ..............................................................................................42

Added Reference Operation Section, Figure 96,

Recommendations When Using an External Reference Section,

and Reference Control Amplifier Section....................................43

Added Table 17; Renumbered Sequentially.................................43

Added DAC Transfer Function Section and Analog Output

Section ..............................................................................................44

Changes to Figure 99 and Figure 100 ...........................................46

Changes to Auxiliary DACs Section and Figure 107..................49

Changes to DAC-to-Modulator Interfacing Section and

Figure 108.........................................................................................49

Changes to Figure 108 and Figure 109 .........................................50

Added Evaluation Board Schematics and Artwork Section, and

Figure 112 to Figure 134.................................................................53

Added Bill of Materials Section and Table 18 .............................76

8/2008—Revision 0: Initial Version

Rev. B | Page 3 of 80

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