AD9816 查看數據表（PDF） - Analog Devices
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AD9816 Datasheet PDF : 16 Pages
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AD9816
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
Pin Pin Name Type Description
1
AVDD
P
+5 V Analog Supply.
2
AVSS
P
Analog Ground.
3, 4 CAPT
AO Reference Decoupling.
44 43 42 41 40 39 38 37 36 35 34
5, 6 CAPB
7
VREF
AO Reference Decoupling.
AO Internal Reference Output.
AVDD 1
AVSS 2
PIN 1
IDENTIFIER
33 DRVSS
32 DB5
8
CML
AO Internal Bias Level.
CAPT 3
31 DB4
CAPT 4
30 DB3
9
VINR
AI Analog Input, Red Channel.
CAPB 5
AD9816
29 DB2
10 AVSS
P
Analog Ground.
CAPB 6
TOP VIEW
28 DB1
VREF 7
(Not to Scale)
27 DB0 (LSB)
OBSOLETE 11 VING
AI Analog Input, Green Channel.
12 AVSS
P
Analog Ground.
13 VINB
AI Analog Input, Blue Channel.
14 AVSS
P
Analog Ground.
15 AVDD
P
+5 V Analog Supply.
16 OFFSET AI Clamp bias level in CDS mode.
Offset adjustment input in SHA
mode.
17 CDSCLK1 DI CDS Reset Level Sampling
Clock.
18 CDSCLK2 DI CDS Data Level Sampling
Clock.
19 ADCCLK DI A/D Converter Sampling Clock.
20 DVSS
P
Digital Ground.
21 DVDD
P
+5 V Digital Supply.
22 NC
No Connect.
CML 8
VINR 9
AVSS 10
VING 11
26 DVSS
25 SLOAD
24 SDATA
23 SCLK
12 13 14 15 16 17 18 19 20 21 22
NC = NO CONNECT
23 SCLK
DI Clock Input for Serial Interface.
24 SDATA
DIO Serial Data Input-Output.
25 SLOAD
DI Load Pulse for Serial Interface.
26 DVSS
P
Digital Ground.
27 DB0
DO Data Output (LSB).
28–32 DB1–DB5 DO Data Outputs.
33 DRVSS
P
Digital Driver Ground.
34 DRVDD P
Digital Driver Supply.
35–39 DB6–DB10 DO Data Outputs.
40 DB11
DO Data Output (MSB).
41 OEB
DI Output Enable, Active Low.
42 NC
No Connect.
43 PGAOUT_C AO PGA Output, Negative. This
pin should be left unconnected
except during evaluation.
44 PGAOUT_T AO PGA Output, Positive. This pin
should be left unconnected
except during evaluation.
NOTES
See Applications Information for circuit configurations.
TYPE: AI = Analog Input, AO = Analog Output, DI = Digital Input,
DO = Digital Output, DIO = Digital Input/Output, P = Power.
REV. A
–7–
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