AD9823 查看數據表（PDF） - Analog Devices
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AD9823 Datasheet PDF : 8 Pages
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AD9823
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin Number
Name
1
CLP
2
NC
3
VDD
4
REFOUT
5
DATAOUT
6
GND
7
BYP1
8
BYP2
9
BYP3
10
NC
11
CCDIN
12
GND
13
SHD
14
SHP
CLP 1
14 SHP
NC
VDD
REFOUT
DATAOUT
2
13 SHD
3 AD9823 12 GND
4
TOP VIEW
(Not to Scale)
11
CCDIN
5
10 NC
GND 6
9 BYP3
BYP1 7
8 BYP2
NC = NO CONNECT
Figure 2. Pin Configurations
Type1
DI
NC
P
AO
AO
P
AO
AO
AO
NC
AI
P
DI
DI
Description
Input Clamp Clock Input (active low, not latched internally).
No connection should be connected to GND or VDD.
Analog Supply.
Output Reference Level.
Output Data Signal.
Analog Ground.
Internal Bias Level Decoupling.
Internal Bias Level Decoupling.
Internal Bias Level Decoupling.
No connection should be connected to GND or VDD.
CCD Input.
Analog Ground.
CDS Sampling Clock Input (For CCD Data Level).
CDS Sampling Clock Input (For CCD Ref Level).
1AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power, NC = No Connect.
SHP AND SHD TIMING
CCD
SIGNAL
tID
SHP
SHD
DATAOUT
DATACLK
(FOR AD9821)
N
N+1
tID
tSHD
tSHP
tS1
tS2
N+2
tCP
tREC
Figure 3. SHP and SHD Timing
Rev. 0 | Page 6 of 8
N+9
N+10
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