MAX144(1998) 查看數據表（PDF） - Maxim Integrated
零件编号
产品描述 (功能)
生产厂家
MAX144
(Rev.:1998)
(Rev.:1998)
Maxim Integrated
MAX144 Datasheet PDF : 16 Pages
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+2.7V, Low-Power, 2-Channel, 108ksps,
Serial 12-Bit ADCs in 8-Pin µMAX
Typical Operating Characteristics (continued)
(VDD = +3.0V, VREF = 2.5V, 0.1µF at REF, fSCLK = 2.17MHz, 16 clocks/conversion cycle (108ksps), CH- = GND for MAX145, TA = +25°C,
unless otherwise noted.)
0.20
0.15
0.10
0.05
0
-0.05
-0.10
-0.15
-0.20
0
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
1024 2048 3072 4096
OUTPUT CODE
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
0.5
0.4
0.3
0.2
0.1
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
VDD (V)
INTEGRAL NONLINEARITY
vs. TEMPERATURE
0.5
0.4
0.3
0.2
0.1
0
-60 -35 -10 15 40 65 90 115 140
TEMPERATURE (°C)
20
0
-20
-40
-60
-80
-100
-120
-140
0
FFT PLOT
VDD = +2.7V
fIN = 10kHz
fSAMPLE = 108ksps
27
54
FREQUENCY (kHz)
EFFECTIVE NUMBER OF BITS
vs. FREQUENCY
12.0
VDD = +2.7V
11.8
11.6
11.4
11.2
11.0
1
10
100
FREQUENCY (kHz)
Pin Description
PIN
NAME
FUNCTION
1
VDD
Positive Supply Voltage, +2.7V to +5.25V
2
CH0 (CH+) Analog Input: MAX144 = single-ended (CH0); MAX145 = differential (CH+)
3
CH1 (CH-) Analog Input: MAX144 = single-ended (CH1); MAX145 = differential (CH-)
4
GND
Analog and Digital Ground
5
REF
External Reference Voltage Input. Sets the analog voltage range. Bypass with a 100nF capacitor close to
the device.
6
CS/SHDN
Active-Low Chip-Select Input/Active-High Shutdown Input. Pulling CS/SHDN high puts the device into
shutdown with a maximum current of 5µA.
7
DOUT
Serial Data Output. Data changes state at SCLK’s falling edge. High impedance when CS/SHDN
is high.
8
SCLK
Serial Clock Input. DOUT changes on the falling edge of SCLK.
6 _______________________________________________________________________________________
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