ADC0801S040 查看數據表（PDF） - NXP Semiconductors.
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ADC0801S040 Datasheet PDF : 19 Pages
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NXP Semiconductors
7. Pinning information
7.1 Pinning
ADC0801S040
Single 8 bits ADC, up to 40 MHz
Fig 2. Pin configuration
CLK 1
SLEEP 2
20 VDDO
19 D7
VDDD 3
18 D6
VSSD 4
17 D5
VDDA 5
16 D4
ADC0801S
VSSA 6 040TS 15 D3
RB 7
14 D2
RM 8
13 D1
VI 9
12 D0
RT 10
11 VSSO
014aaa494
7.2 Pin description
Table 3.
Symbol
CLK
SLEEP
VDDD
VSSD
VDDA
VSSA
RB
RM
VI
RT
VSSO
D0
D1
D2
D3
D4
D5
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Description
clock input
sleep mode input
digital supply voltage (2.7 V to 5.5 V)
digital ground
analog supply voltage (2.7 V to 5.5 V)
analog ground
reference voltage BOTTOM input
reference voltage MIDDLE
analog input voltage
reference voltage TOP input
output stage ground
data output; bit 0 (Least Significant Bit (LSB))
data output; bit 1
data output; bit 2
data output; bit 3
data output; bit 4
data output; bit 5
ADC0801S040_2
Product data sheet
Rev. 02 — 18 August 2008
© NXP B.V. 2008. All rights reserved.
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