ADF4360-7BCPZRL 查看數據表（PDF） - Analog Devices
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ADF4360-7BCPZRL Datasheet PDF : 28 Pages
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ADF4360-7
SPECIFICATIONS1
AVDD = DVDD = VVCO = 3.3 V ± 10%; AGND = DGND = 0 V; TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
REFIN CHARACTERISTICS
REFIN Input Frequency
B Version
10/250
REFIN Input Sensitivity
REFIN Input Capacitance
REFIN Input Current
PHASE DETECTOR
Phase Detector Frequency2
CHARGE PUMP
ICP Sink/Source3
High Value
Low Value
RSET Range
ICP Three-State Leakage Current
Sink and Source Current Matching
ICP vs. VCP
ICP vs. Temperature
LOGIC INPUTS
VINH, Input High Voltage
VINL, Input Low Voltage
IINH/IINL, Input Current
CIN, Input Capacitance
LOGIC OUTPUTS
VOH, Output High Voltage
IOH, Output High Current
VOL, Output Low Voltage
POWER SUPPLIES
AVDD
DVDD
VVCO
AIDD4
DIDD4
IVCO4, 5
IRFOUT4
Low Power Sleep Mode
Specifications continued on next page.
0.7/AVDD
0 to AVDD
5.0
±60
8
2.5
0.312
2.7/10
0.2
2
1.5
2
1.5
0.6
±1
3.0
DVDD – 0.4
500
0.4
3.0/3.6
AVDD
AVDD
10
2.5
14.0
3.5 to 11.0
7
Unit
MHz min/max
V p-p min/max
V max
pF max
µA max
MHz max
mA typ
mA typ
kΩ
nA typ
% typ
% typ
% typ
V min
V max
µA max
pF max
V min
µA max
V max
V min/V max
mA typ
mA typ
mA typ
mA typ
µA typ
Conditions/Comments
For f < 10 MHz, use a dc-coupled CMOS-compatible
square wave, slew rate > 21 V/µs.
AC-coupled.
CMOS compatible.
With RSET = 4.7 kΩ.
1.25 V ≤ VCP ≤ 2.5 V.
1.25 V ≤ VCP ≤ 2.5 V.
VCP = 2.0 V.
CMOS output chosen.
IOL = 500 µA.
ICORE = 5 mA.
RF output stage is programmable.
Rev. A | Page 3 of 28
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