ADG633YCPZ-REEL7 查看數據表（PDF） - Analog Devices
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ADG633YCPZ-REEL7 Datasheet PDF : 16 Pages
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ADG633
SPECIFICATIONS
DUAL-SUPPLY OPERATION
VDD = +5 V, VSS = −5 V, GND = 0 V, TA = −40°C to +125°C, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match
Between Channels, ΔRON
On-Resistance Flatness, RFLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS(OFF)
Drain Off Leakage, ID(OFF)
Channel On Leakage, ID(ON), IS(ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
+25°C
52
75
0.8
1.3
9
12
±0.005
±0.2
±0.005
±0.2
±0.005
±0.2
0.005
Digital Input Capacitance, CIN
2
DYNAMIC CHARACTERISTICS1
tTRANSITION
60
90
tON (EN)
70
95
tOFF (EN)
25
40
Break-Before-Make Time Delay, tBBM 40
Charge Injection
Off Isolation
Total Harmonic Distortion, THD + N
Channel-to-Channel Crosstalk
−3 dB Bandwidth
CS(OFF)
CD(OFF)
CD(ON), CS(ON)
POWER REQUIREMENTS
IDD
2
4
−90
0.025
−90
580
4
7
12
0.01
ISS
0.01
B Version
−40°C to +85°C
Y Version
−40°C to +125°C Unit
Test Conditions/Comments
VSS to VDD
V
VDD = +4.5 V, VSS = −4.5 V
Ω typ
VS = ±4.5 V, IS = 1 mA; see Figure 20
90
100
Ω max VS = ±4.5 V, IS = 1 mA; see Figure 20
Ω typ
VS = +3.5 V, IS = 1 mA
1.8
2
13
14
±5
±5
±5
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = +3.5 V, IS = 1 mA
VDD = +5 V, VSS = −5 V, VS = ±3 V, IS = 1 mA
VDD = +5 V, VSS = −5 V, VS = ±3 V, IS = 1 mA
VDD = +5.5 V, VSS = −5.5 V
VD = ±4.5 V, VS = +4.5 V; see Figure 21
VD = ±4.5 V, VS = +4.5 V; see Figure 21
VD = ±4.5 V, VS = + 4.5 V; see Figure 22
VD = ±4.5 V, VS = + 4.5 V; see Figure 22
VD = VS = ±4.5 V; see Figure 23
VD = VS = ±4.5 V; see Figure 23
2.4
V min
0.8
V max
μA typ
VIN = VINL or VINH
±1
μA max VIN = VINL or VINH
pF typ
ns typ
RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 24
110
130
ns max RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 24
ns typ
RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 26
120
135
ns max RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 26
ns typ
RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 26
45
50
ns max RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 26
ns typ
RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3 V; see Figure 25
10
ns min RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3 V; see Figure 25
pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 27
pC max VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 27
dB typ
% typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28
RL = 600 Ω, 2 V p-p, f = 20 Hz to 20 kHz
dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 30
MHz typ RL = 50 Ω, CL = 5 pF; see Figure 29
pF typ f = 1 MHz
pF typ f = 1 MHz
pF typ f = 1 MHz
VDD = +5.5 V, VSS = −5.5 V
μA typ Digital inputs = 0 V or 5.5 V
1
μA max Digital inputs = 0 V or 5.5 V
μA typ Digital inputs = 0 V or 5.5 V
1
μA max Digital inputs = 0 V or 5.5 V
1 Guaranteed by design; not subject to production test.
Rev. A | Page 3 of 16
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