ADM1065ACPZ 查看數據表（PDF） - Analog Devices

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ADM1065ACPZ

Super Sequencer and Monitor

Analog Devices 

Data Sheet

ADM1065

SPECIFICATIONS

VH = 3.0 V to 14.4 V1, VPx = 3.0 V to 6.0 V1, TA = −40°C to +85°C, unless otherwise noted.

Table 1.

Parameter

POWER SUPPLY ARBITRATION

VH, VPx

VPx

VH

VDDCAP

CVDDCAP

POWER SUPPLY

Supply Current, IVH, IVPx

Additional Currents

All PDO FET Drivers On

Current Available from VDDCAP

EEPROM Erase Current

SUPPLY FAULT DETECTORS

VH Pin

Input Impedance

Input Attenuator Error

Detection Ranges

High Range

Midrange

VPx Pins

Input Impedance

Input Attenuator Error

Detection Ranges

Midrange

Low Range

Ultralow Range

VXx Pins

Input Impedance

Detection Ranges

Ultralow Range

Absolute Accuracy

Threshold Resolution

Digital Glitch Filter

REFERENCE OUTPUT

Reference Output Voltage

Load Regulation

Minimum Load Capacitance

PSRR

Min

3.0

2.7

10

6

2.5

2.5

1.25

0.573

1

0.573

2.043

1

Typ

Max

Unit Test Conditions/Comments

V

Minimum supply required on one of VH, VPx

6.0

V

Maximum VDDCAP = 5.1 V typical

14.4

V

VDDCAP = 4.75 V

4.75

5.4

V

Regulated LDO output

µF Minimum recommended decoupling

capacitance

4.2

6

mA VDDCAP = 4.75 V, PDO1 to PDO10 off

1

2

10

mA VDDCAP = 4.75 V, PDO1 to PDO6 loaded with

1 µA each, PDO7 to PDO10 off

mA Maximum additional load that can be drawn

from all PDO pull-ups to VDDCAP

mA 1 ms duration only, VDDCAP = 3 V

52

±0.05

52

±0.05

8

0

100

2.048

−0.25

0.25

60

14.4

6

6

3

1.375

1.375

±1

2.053

kΩ

% Midrange and high range

V

V

kΩ

% Low range and midrange

V

V

V

No input attenuation error

MΩ

V

No input attenuation error

% VREF error + DAC nonlinearity + comparator

offset error + input attenuation error

Bits

µs Minimum programmable filter length

µs Maximum programmable filter length

V

No load

mV Sourcing current

mV Sinking current

µF Capacitor required for decoupling, stability

dB DC

Rev. E | Page 5 of 28

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