ADM1067ASUZ1 查看數據表（PDF） - Analog Devices

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ADM1067ASUZ1

Super Sequencer® with Open-Loop Margining DACs

Analog Devices 

ADM1067

Pin Number

LFCSP1 TQFP

38

45

39

46

40

47

Mnemonic

MDN

VDDCAP

GND2

Description

Digital Input. Forces DACs to their highest value, causing the voltage at the feedback node to rise.

This is compensated for by a decrease in the supply output voltage, thus margining down.

Device Supply Voltage. Linearly regulated from the highest of the VPn, VH pins to a typical of 4.75 V.

Note that the capacitor must be connected between this pin and GND. A 10 μF capacitor is

recommended for this purpose.

Supply Ground.

1 Note that the LFCSP has an exposed pad on the bottom. This pad is a no connect (NC). If possible, this pad should be soldered to the board for improved mechanical stability.

2 In a typical application, all ground pins are connected together.

Rev. B | Page 8 of 32

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