ADM1069(RevC) 查看數據表（PDF） - Analog Devices
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ADM1069 Datasheet PDF : 32 Pages
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Supply margining can be performed with a minimum of external
components. The margining loop can be used for in-circuit
testing of a board during production (for example, to verify
board functionality at −5% of nominal supplies), or it can be
used dynamically to accurately control the output voltage of
a dc-to-dc converter.
The device also provides up to eight programmable inputs for
monitoring undervoltage faults, overvoltage faults, or out-of-
window faults on up to eight supplies. In addition, there are eight
programmable outputs that can be used as logic enables. Six of
these programmable outputs can also provide up to a 12 V output
for driving the gate of an N-FET that can be placed in the path
of a supply.
DETAILED BLOCK DIAGRAM
ADM1069
The logical core of the device is a sequencing engine (SE). This
state machine-based construction provides up to 63 different states.
This design enables very flexible sequencing of the outputs, based
on the condition of the inputs.
The ADM1069 is controlled via configuration data that can be
programmed into an EEPROM. The entire configuration can
be programmed using an intuitive GUI-based software package
provided by Analog Devices, Inc.
REFIN
REFOUT
REFGND SDA SCL A1 A0
ADM1069
VREF
SMBus
INTERFACE
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
AGND
VDDCAP
SELECTABLE
ATTENUATOR
SELECTABLE
ATTENUATOR
VDD
ARBITRATOR
12-BIT
SAR ADC
GPI SIGNAL
CONDITIONING
SFD
GPI SIGNAL
CONDITIONING
SFD
SFD
DEVICE
CONTROLLER
OSC
EEPROM
CONFIGURABLE
OUTPUT DRIVER
(HV)
SEQUENCING
ENGINE
CONFIGURABLE
OUTPUT DRIVER
(HV)
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
CONFIGURABLE
OUTPUT DRIVER
(LV)
PDO7
SFD
REG 5.25V
CHARGE PUMP
VOUT
DAC
CONFIGURABLE
OUTPUT DRIVER
(LV)
VOUT
DAC
PDO8
PDOGND
GND
VCCP
DAC1 DAC2 DAC3 DAC4
Figure 2. Detailed Block Diagram
Rev. C | Page 3 of 32
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