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ADM1034ARQZ-REEL 查看數據表(PDF) - ON Semiconductor

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产品描述 (功能)
生产厂家
ADM1034ARQZ-REEL
ON-Semiconductor
ON Semiconductor ON-Semiconductor
ADM1034ARQZ-REEL Datasheet PDF : 39 Pages
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ADM1034
ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted. (Note 1)
Parameter
Test Conditions / Comments
Min
Typ
Max
Unit
AGTL + INPUT (THERM)
Input High Level
0.75 x
V
REF
Input Low Level
0.4
V
Tachometer Accuracy
Fan Speed Measurement Accuracy
±4.0
%
SERIAL BUS TIMING (Note 4)
Clock Frequency, fSCLK
See Figure 2
400
kHz
Glitch Immunity, tSW
See Figure 2
50
ns
Bus Free Time, tBUF
See Figure 2
1.3
ms
Start Setup Time, tSU:STA
See Figure 2
0.6
ms
Start Hold Time, tHD:STA
See Figure 2
0.6
ms
Stop Condition Setup Time tSU:STO
See Figure 2
0.6
ms
SCL Low Time, tLOW
See Figure 2
1.3
ms
SCL High Time, tHIGH
See Figure 2
0.6
ms
SCL, SDA Rise Time, tr
See Figure 2
1000
ns
SCL, SDA Fall Time, tf
See Figure 2
300
ns
Data Setup Time, tSU:DAT
See Figure 2
100
ns
Detect Clock Low Timeout, tTIMEOUT
See Note 5
25
35
ms
1. Typicals are at TA = 25°C and represent most likely parametric norm. Standby current typ. is measured with VCC = 3.3 V. Timing specifications
are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.1 V for a rising edge.
2. Operation at 5.5 V is guaranteed by design, not production tested.
3. Recommend use of 100 kW pullup resistors for all opendrain outputs from the ADM1034.
4. Guaranteed by design, not production tested.
5. SMBus timeout disabled by default. See the SMBus section for more information.
SCL
tLOW tR
tHD:STA
tHD:DAT
SDA
tBUF
P
S
tF
tHIGH
tSU:DAT
tHD:STA
tSU:STA
S
Figure 2. Serial Bus Timing Diagram
tSU:STO
P
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