N28F001BX-B120 查看數據表（PDF） - Intel

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N28F001BX-B120

1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY

Intel 

28F001BX-T 28F001BX-B

The use of RP during system reset is important

with automated write erase devices When the sys-

tem comes out of reset it expects to read from the

flash memory Automated flash memories provide

status information when accessed during write

erase modes If a CPU reset occurs with no flash

memory reset proper CPU initialization would not

occur because the flash memory would be providing

the status information instead of array data Intel’s

Flash Memories allow proper CPU initialization fol-

lowing a system reset through the use of the RP

input In this application RP is controlled by the

same RESET signal that resets the system CPU

Intelligent Identifier Operation

The Intelligent Identifier operation outputs the manu-

facturer code 89H and the device code 94H for the

28F001BX-T and 95H for the 28F001BX-B Pro-

gramming equipment or the system CPU can then

automatically match the device with its proper erase

and programming algorithms

PROGRAMMING EQUIPMENT

CE and OE at a logic low level (VIL) with A9 at

high voltage VID (see DC Characteristics) activates

this operation Data read from locations 00000H and

00001H represent the manufacturer’s code and the

device code respectively

IN-SYSTEM PROGRAMMING

The manufacturer- and device-codes can also be

read via the Command Register Following a write of

90H to the Command Register a read from address

location 00000H outputs the manufacturer code

(89H) A read from address 00001H outputs the de-

vice code (94H for the 28F001BX-T and 95H for the

28F001BX-B) It is not necessary to have high volt-

age applied to VPP to read the Intelligent Identifiers

from the Command Register

Write

Writes to the Command Register allow read of de-

vice data and Intelligent Identifiers They also con-

trol inspection and clearing of the Status Register

Additionally when VPP e VPPH the Command Reg-

ister controls device erasure and programming The

contents of the register serve as input to the internal

state machine

The Command Register itself does not occupy an

addressable memory location The register is a latch

used to store the command and address and data

information needed to execute the command Erase

Setup and Erase Confirm commands require both

appropriate command data and an address within

the block to be erased The Program Setup Com-

mand requires both appropriate command data and

the address of the location to be programmed while

the Program command consists of the data to be

written and the address of the location to be pro-

grammed

The Command Register is written by bringing WE

to a logic-low level (VIL) while CE is low Address-

es and data are latched on the rising edge of WE

Standard microprocessor write timings are used

Refer to AC Write Characteristics and the AC Wave-

form for Write Operations Figure 13 for specific tim-

ing parameters

COMMAND DEFINITIONS

When VPPL is applied to the VPP pin read opera-

tions from the Status Register intelligent identifiers

or array blocks are enabled Placing VPPH on VPP

enables successful program and erase operations

as well

Device operations are selected by writing specific

commands into the Command Register Table 3 de-

fines these 28F001BX commands

Read Array Command

Upon initial device powerup and after exit from

deep-powerdown mode the 28F001BX defaults to

Read Array mode This operation is also initiated by

writing FFH into the Command Register Microproc-

essor read cycles retrieve array data The device re-

mains enabled for reads until the Command Regis-

ter contents are altered Once the internal write

state machine has started an erase or program op-

eration the device will not recognize the Read Array

command until the WSM has completed its opera-

tion The Read Array command is functional when

VPP e VPPL or VPPH

Intelligent Identifier Command for

In-System Programming

The 28F001BX contains an Intelligent Identifier op-

eration to supplement traditional PROM-program-

ming methodology The operation is initiated by writ-

ing 90H into the Command Register Following the

command write a read cycle from address 00000H

retrieves the manufacturer code of 89H A read cy-

cle from address 00001H returns the device code of

94H (28F001BX-T) or 95H (28F001BX-B) To termi-

nate the operation it is necessary to write another

valid command into the register Like the Read Array

command the Intelligent Identifier command is func-

tional when VPP e VPPL or VPPH

8

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