DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ADM6308 查看數據表(PDF) - Unspecified

零件编号
产品描述 (功能)
生产厂家
ADM6308 Datasheet PDF : 17 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Olive plus Specification
6
MDC
43 O Management Data Clock. Provides the reference clock for the MDIO signal
8ma
MDIO
45 BI Management Data Input/output. This pin provides the channels for ADM6308 and
8ma Transceivers to transfer the control information and status.
LED Display
QFLED#
46
High Priority Frame
tri Buffer Full or Faulty LED Display. This occurs when the packet is lost and flow control is
8ma disabled. Or, if flow control is enabled and jam or PAUSE frames are sent, buffer full LED
will flash. If it is found faulty, the LED will always be on. (See LED function description)
high_port[0]
high_port[1]
high_port[2]
high_port[3]
high_port[4]
high_port[5]
high_port[6]
high_port[7]
53 BI Priority setting for port0~port7. Internally pull down.
54
High = high priority
55
56
58
59
60
61
Configuration
BP0
50
BP1
49
NA16#
51
XFC#
48
Miscellaneous
I Back Pressure Mode. Internally pull down. The BP0~1 modes define 4 different back-
pressure methods. Each BPA1~3 has different algorithm described in EEPROM section.
The following shows ADM6308 configuration of back-pressure.
BP1 BP0
0
0 Back Pressure Disable
0
1 BPA1 (Back Pressure Algorithm 1) Enable
1
0 BPA2 (Back Pressure Algorithm 2) Enable
1
1 BPA3 (Back Pressure Algorithm 3) Enable
I Not aborted after continuous 16- times of collision if pull down. Internally pull up.
I Full Duplex Flow Control. Internally pull up. When 802.3 x flow control is disable, no
PAUSE frame will be sent. (default)
REFCLK
RESET#
RECALL
TEST[0]
TEST[1]
Power
10 I Clock reference input of 50MHz Reduced MII. Synchronous clock reference for receiving,
transmitting, and control interface.
63 I RESET#. Active low. For power on reset to initiate ADM6308 and let all the state machines
and statuses enter the initial and default state. Besides, all the LED will be turned on when
power is on or RAM testing failed.
52 I Whenever the level is changed, ADM6308 recalls EEPROM or 8051-like controller to get
configuration data. Internally pull down.
65 I Test mode. Internally pull down
66 I Test mode. Internally pull down
Vddi
Vddo
6, 23, 38, 57, 68, 89
2.5V
11, 27, 44, 71, 94
3.3V
ADMtek Incorporated
00/04/25
1F, No 9, Industrial E. 9th Road, SBIP, Hsin-Chu
Version : 1.10
Tel : (03)578-8879 Fax : (03)578-8871
ADMtek Incorporated Confidential

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]