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ADM6384YKS17D3Z-R7(RevE) 查看數據表(PDF) - Analog Devices

零件编号
产品描述 (功能)
生产厂家
ADM6384YKS17D3Z-R7
(Rev.:RevE)
ADI
Analog Devices ADI
ADM6384YKS17D3Z-R7 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADM6384
APPLICATIONS INFORMATION
NEGATIVE GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply tran-
sients, the ADM6384 is equipped with glitch rejection circuitry.
The typical performance characteristic shown in Figure 10 plots
VCC transient duration vs. the transient magnitude. The curves
show combinations of transient magnitude and duration for which
a reset is not generated for 4.63 V and 2.93 V reset threshold
devices. For example, with the 2.93 V threshold, a transient that
goes 100 mV below the threshold and lasts 8 µs typically does
not cause a reset, but if the transient is any greater in magnitude
or duration, a reset is generated. An optional 0.1 µF bypass
capacitor mounted close to VCC provides additional glitch
rejection.
Data Sheet
ENSURING RESET VALID TO VCC = 0 V
Both active low and active-high reset outputs are guaranteed to
be valid for VCC as low as 1 V. However, by using an external
resistor with push pull configured reset outputs, valid outputs
for VCC as low as 0 V are possible. For an active low reset output,
a resistor connected between RESET and ground pulls the
output low when it is unable to sink current. Use a large resistance
such as 100 kΩ to avoid overloading the reset output when VCC
is above 1 V.
VCC
ADM6384
RESET
GND
100kΩ
Figure 13. Ensuring Reset Valid to VCC = 0 V
Rev. E | Page 10 of 12

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