ADN2807 查看數據表（PDF） - Analog Devices

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产品描述 (功能)

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ADN2807

155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier

Analog Devices 

ADN2807

OUTP

OUTN

OUTP–OUTN

0V

18

16

14

12

10

8

6

4

2

0

0 1 2 3 4 5 6 7 8 9 10

HYSTERESIS (dB)

Figure 6. LOS Hysteresis OC-12, −40°C, 3.6 V,

223 –1 PRBS Input Pattern, RTH = 90 kΩ

VCML

VSE

VDIFF

Figure 7. Single-Ended vs. Differential Output Specifications

Data Sheet

VSE

Rev. B | Page 8 of 21

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