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ADN2811

OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp

Analog Devices 

ADN2811

TABLE OF CONTENTS

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

Thermal Characteristics .............................................................. 5

ESD Caution.................................................................................. 5

Pin Configuration and Functional Descriptions.......................... 6

Definition of Terms .......................................................................... 8

Maximum, Minimum, and Typical Specifications ................... 8

Input Sensitivity and Input Overdrive....................................... 8

Single-Ended vs. Differential ...................................................... 8

LOS Response Time ..................................................................... 9

Jitter Specifications....................................................................... 9

Theory of Operation ...................................................................... 10

Functional Description .................................................................. 12

Clock and Data Recovery .......................................................... 12

REVISION HISTORY

5/04—Data Sheet Changed from Rev. A to Rev. B

Updated Format.................................................................. Universal

Changes to Table 6 and Table 7......................................................13

Updated Outline Dimensions ........................................................19

Changes to Ordering Guide ...........................................................19

12/02—Data Sheet Changed from Rev. 0 to Rev. A.

Change to FUNCTIONAL DESCRIPTION Reference Clock ..10

Updated OUTLINE DIMENSIONS .............................................16

Limiting Amplifier ..................................................................... 12

Slice Adjust .................................................................................. 12

Loss of Signal (LOS) Detector .................................................. 12

Reference Clock.......................................................................... 12

Lock Detector Operation .......................................................... 13

Squelch Mode ............................................................................. 14

Test Modes: Bypass and Loopback........................................... 14

Applications Information .............................................................. 15

PCB Design Guidelines ............................................................. 15

Choosing AC-Coupling Capacitors ......................................... 17

DC-Coupled Application .......................................................... 18

LOL Toggling during Loss of Input Data................................ 18

Outline Dimensions ....................................................................... 19

Ordering Guide .......................................................................... 19

Rev. B | Page 2 of 20

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