ADN2811 查看數據表（PDF） - Analog Devices

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ADN2811

OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp

Analog Devices 

CLKOUTP

DATAOUTP/N

TS

TH

Figure 3. Output Timing

18

THRADJ RESISTOR VS. LOS TRIP POINT

16

14

12

10

8

6

4

2

0

0 10 20 30 40 50 60 70 80 90 100

RESISTANCE (kΩ)

Figure 4. LOS Comparator Trip Point Programming

OUTP

OUTN

OUTP–OUTN

0V

VCML

VSE

VDIFF

Figure 5. Single-Ended vs. Differential Output Specs

ADN2811

VSE

Rev. B | Page 7 of 20

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