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ADP196

5 V, 3 A, Logic Controlled High-Side Power Switch

Analog Devices 

Data Sheet

THEORY OF OPERATION

The ADP196 is a high-side NMOS load switch controlled by an

internal charge pump. The ADP196 is designed to operate with

power supply voltages from 1.8 V to 5.5 V.

An internal charge pump biases the NMOS switch to achieve a

relatively constant, ultralow on resistance of 10 mΩ across the

entire input voltage range (6-ball WLCSP package). The use of the

internal charge pump also allows for controlled turn-on times.

Turning the NMOS switch on and off is controlled by the enable

input, EN, which is capable of interfacing directly to 1.2 V logic

signals.

VIN

GND

EN

OVERTEMPERATURE

PROTECTION

CHARGE PUMP

OVERCURRENT AND

SLEW RATE CONTROL

VOUT

QOD ADP196-01 ONLY

Figure 21. Functional Block Diagram

ADP196

The ADP196 supports 3 A of continuous current as long as TJ is

less than 70°C. At 85°C, the rated current decreases to 2.22 A.

Overcurrent protection limits the output current to 4 A.

The overtemperature protection circuit is activated if the load

current causes the junction temperature to exceed 125°C. When

this occurs, the overtemperature protection circuitry disables

the output until the junction temperature falls below approximately

110°C, at which point the output is reenabled. If the fault condition

persists, the output cycles off and on until the fault is removed.

Additional protection is provided by an overcurrent limit that

forces the device into a constant current mode of operation.

The ADP196-01 incorporates a quick output discharge (QOD)

circuit to discharge the output capacitance when the ADP196-01

output is disabled.

ESD protection structures are shown in the block diagram as

Zener diodes (see Figure 21).

The ADP196 is a low quiescent current device with a nominal

4 MΩ pull-down resistor on its enable pin (EN).

The ADP196 is available in a space-saving 1.0 mm × 1.5 mm,

0.5 mm pitch, 6-ball WLCSP and a tiny 2.0 mm × 2.0 mm ×

0.55 mm, 0.65 mm pitch, 6-lead LFCSP.

Rev. 0 | Page 9 of 12

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