ADP3367AR 查看數據表（PDF） - Analog Devices
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ADP3367AR Datasheet PDF : 8 Pages
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ADP3367
APPLICATIONS INFORMATION
Circuit Configurations
For a fixed +5 V output the SET input should be grounded, and
no external resistors are necessary. This basic configuration is
shown in Figure 8. The input voltage can range from +5.15 V
to +16.5 V, and output currents up to 300 mA are available
provided that the maximum package power dissipation is not
exceeded.
IN
+
OUT
+ C1
+5V
OUTPUT
ADP3367
10µF
SET GND SHDN
Figure 8. Fixed +5 V Output Circuit
Output Voltage Setting
If the SET input is connected to a resistor divider network, the
output voltage is set according to the following equation:
VOUT
= V SET
× R1 + R2
R1
where VSET = 1.255 V.
VIN
IN
OUT
VOUT
ADP3367
R2
+ C1
10µF
SET
R1
SHDN GND
Figure 9. Adjustable Output Circuit
The resistor values may be selected by first choosing a value for
R1 and then selecting R2 according to the following equation:
R2 = R1 × VVOSEUTT
−
1
The input leakage current on SET is 10 nA maximum. This
allows large resistor values to be chosen for R1 and R2 with
little degradation in accuracy. For example, a 1 MΩ resistor
may be selected for R1, and then R2 may be calculated accord-
ingly. The tolerance on SET is guaranteed at less than ± 25 mV,
so in most applications fixed resistors will be suitable.
Shutdown Input (SHDN)
The SHDN input allows the regulator to be switched off with a
logic level signal. This will disable the output and reduce the
current drain to a low quiescent (0.75 µA maximum) current.
This is very useful for low power applications. Driving the
SHDN input to greater than 1.5 V places the part in shutdown.
If the shutdown function is not being used, then SHDN should
be connected to GND.
Low Supply or Low Battery Detection
The ADP3367 contains on-chip circuitry for low power supply
or battery detection. If the voltage on the LBI pin falls below
the internal 1.255 V reference, then the open drain output LBO
will go low. The low threshold voltage may be set to any voltage
above 1.255 V by appropriate resistor divider selection.
R3
=
R4
×
VBATT
VLBI
−
1
where R3 and R4 are the resistive divider resistors and VBATT is
the desired low voltage threshold.
Since the LBI input leakage current is less than 10 nA, large
values may be selected for R3 and R4 in order to minimize
loading. For example, a 6 V low threshold, may be set using
10 MΩ for R3 and 2.7 MΩ for R4.
The LBO output is an open-drain output that goes low sinking
current when LBI is less than 1.255 V. A pull-up resistor of
10 kΩ or greater may be used to obtain a logic output level with
the pull-up resistor connected to VOUT.
VIN
R3
R4
IN
OUT
ADP3367
LBI
LBO
SHDN GND SET
10kΩ
+ C1
10µF
VOUT
LOW BATTERY
STATUS OUTPUT
Figure 10. Low Battery/Supply Detect Circuit
Dropout Detector
The ADP3367 features an extremely low dropout voltage mak-
ing it suitable for low voltage systems where headroom is
limited. A dropout detector is also provided. The dropout
detector output, DD, changes as the dropout voltage approaches
its limit. This is useful for warning that regulation can no longer be
maintained. The dropout detector output is an open collector out-
put from a PNP transistor. Under normal operating conditions
with the input voltage more than 300 mV above the output, the
PNP transistor is off and no current flows out the DD pin. As the
voltage differential reduces to less than 300 mV, the transistor
switches on and current is sourced. This condition indicates that
regulation can no longer be maintained. Please refer to Figure 4 in
the “Typical Performance Characteristics.” The current output
can be translated into a voltage output by connecting a resistor
from DD to GND. A resistor value of 100 kΩ is suitable. A digital
status signal can be obtained using a comparator. The on-chip
comparator LBI may be used if it is not being used to monitor a
battery voltage. This is illustrated in Figure 11.
REV. 0
–5–
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