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ADP3367AR 查看數據表(PDF) - Analog Devices

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ADP3367AR Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
ADP3367
processor. Monitoring the supply, the ADM705 will generate a
reset if the supply voltage falls below 4.65 V. Early warning of
an impending power fail is generated by a power fail comparator
on the ADM705. A resistive divider network samples the pre-
regulator input voltage so that failing power is detected while
the regulator is still operating normally. An interrupt is gener-
ated so that a power-down sequence can be completed before
power is completely lost. The low dropout voltage on the
ADP3367 maximizes the available time to carry out the power-
down sequence. The resistor divider network R1 and R2 should
be selected so that the voltage on PFI is 1.25 V at the desired
warning voltage.
UNREGULATED
DC
IN
ADP3367
OUT
GND SET SHDN
+5V
+
10µF
VCC
RESET
R1
ADM705
PFI
R2
PFO
GND
VCC
RESET
µP
INTERRUPT
Figure 15. µP Regulator with Supply Monitoring and Early
Power-Fail Warning
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Narrow-Body SOIC
(SO-8)
8
PIN 1
1
5
0.1574 (4.00)
0.1497 (3.80)
4
0.2440 (6.20)
0.2284 (5.80)
0.0098 (0.25)
0.0040 (0.10)
0.1968 (5.00)
0.1890 (4.80)
0.0196 (0.50)
0.0099 (0.25)
x 45°
0.0688 (1.75)
0.0532 (1.35)
0.0500 0.0192 (0.49)
(1.27)
BSC
0.0138 (0.35)
8°
0.0098 (0.25) 0°
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
–8–
REV. 0

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