ADP3422JRU 查看數據表（PDF） - Analog Devices

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ADP3422JRU

IMVP-II-Compliant Core Power Controller for Mobile CPUs

Analog Devices 

ADP3422–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS1 (0 ≤ TA ≤ 85؇C, High (H) = VCC, Low (L) = 0 V, VCC = 3.3 V, SD = H, VCOREFB = VDAC

(ϵ VDACOUT), VREG = VCS– = VVID = 1.25 V, VCPUSET = 0 V, ROUT = 100 k⍀, COUT = 10 pF, CSS = 47 nF, RPWRGD = 5 k⍀ to VCC, RCLAMP = 5.1 k⍀

to VCC, HYSSET, BSHIFT, DSHIFT, and FSHIFT are open, BOM = H, DSLP = H, DPRSLP = L, SWFB = L, unless otherwise noted. Current sunk

by a pin has a positive sign, sourced by a pin has a negative sign.)

Parameter

Symbol

Conditions

Min

Typ Max

Unit

SUPPLY-UVLO-SHUTDOWN

Normal Supply Current

UVLO Supply Current

Shutdown Supply Current

UVLO Threshold

UVLO Hysteresis

Shutdown Threshold (CMOS Input)

POWERGOOD

Core Feedback Threshold Voltage

ICC

ICC(UVLO)

ICCSD

VCCH

VCCL

VCCHYS

VSDTH

VCOREFBH

PowerGood Output Voltage

(Open Drain Output)

Blanking Time

SOFT-START/HICCUP TIMER

Charge/Discharge Current

Soft-Start Enable/Hiccup

Termination Threshold

VPWRGD

tPWRGD,BLNK2

ISS

VSSEN

Soft-Start Termination/Hiccup

Enable Threshold

VSSTERM

VID DAC

VID Input Threshold (CMOS Inputs) VVID0...4

VID Input Current

IVID0...4

(Internal Active Pull-up)

Output Voltage

Output Voltage Accuracy

Output Voltage Settling Time3

VDAC

⌬VDAC/VDAC

tDACS4

CORE COMPARATOR

Input Offset Voltage

Input Bias Current

Output Voltage

Propagation Delay Time3

Rise and Fall Time2

Blanking Time

VCOREOS

IREG

VOUT_H

VOUT_L

tRMPOUT_PD5

tOUT_R6

tOUT_F6

tBLNK

Switch Feedback Threshold

(CMOS Input)

VSWFB_TH

SD = L

VCC Rising Up, VSS = 0 V

VCC Falling, VSS Floating

0.9 V < VDAC < 1.675 V

VCOREFB Rising

VCOREFB Falling

VCOREFB Rising

VCOREFB Falling

VCOREFB = VDACOUT

VCOREFB = 0.8 VDACOUT

VCC = 3.3 V

VSS = 0.5 V

VSS = 0.5 V, VCC = 2.5 V

VREG = 1.25 V,

VRAMP = VCOREFB = 1.27 V

VSS Falling

VSS Rising

VRAMP = VCOREFB = 1.27 V

VSS Rising

VSS Falling

VID 0...4 = L

See VID Code Table 1

VREG = 1.25 V

VREG = VRAMP = 1.25 V

VCC = 3.0 V

VCC = 3.6 V

OUT L-H Transition

OUT H-L Transition

6

15

mA

200

µA

1

µA

2.95

V

2.7

V

50

mV

VCC/2

1.12 VDAC

1.095 VDAC

0.88 VDAC

0.855 VDAC

0.95 VCC

0

100

1.145 VDAC V

1.12 VDAC V

0.905 VDAC V

0.88 VDAC V

VCC

V

0.8

V

µs

–16

µA

0.6

µA

150 200

mV

200

mV

2.05

V

2.0

V

0.8

0.7 VCC

V

10

40

µA

0.600

1.750

V

–0.85

+0.85

%

1.3

µs

± 1.5

mV

± 0.3

µA

2.5

3.0

V

0

0.4

V

50

ns

3

10

ns

3

10

ns

75

ns

140

ns

VCC/2

V

–2–

REV. 0

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