ADP3422JRU 查看數據表（PDF） - Analog Devices
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ADP3422JRU Datasheet PDF : 16 Pages
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Parameter
HYSTERESIS SETTING
Hysteresis Current
Symbol
IRAMP_H
Hysteresis Reference Voltage
SHIFT SETTING
Battery-Shift Current
VHYSSET
IRAMPB
Battery-Shift Reference Voltage
DeepSleep-Shift Current
VBSHIFT
IRAMPD
DeepSleep-Shift Reference Voltage
CPU-FID-Shift Current
VDSHIFT
IRAMPF
CPU-FID-Shift Reference Voltage
SHIFT CONTROL INPUTS
BOM Threshold
(CMOS Input)
DSLP Threshold
(IO-Level CMOS Input)
DPRSLP Mode Threshold
(CMOS Input)
CURRENT LIMIT COMPARATOR
Input Offset Voltage
Input Bias Current
Hysteresis Current
VFSHIFT
VBOM
VDSLP
VDPRSLP
VCLIMOS
ICS+
ICS–
Propagation Delay Time
tCLPD5
Conditions
Min
VREG = 1.25 V
VCOREFB = VDAC
IHYSSET = 0
VRAMP = 1.23 V, BOM = H
IHYSSET = –10 µA
IHYSSET = –100 µA
VRAMP = 1.27 V, BOM = H
IHYSSET = –10 µA
IHYSSET = –100 µA
VRAMP = 1.23 V, BOM = L
IHYSSET = –10 µA
IHYSSET = –100 µA
VRAMP = 1.27 V, BOM = L
IHYSSET = –10 µA
IHYSSET = –100 µA
+8
+89
–8
–89
+6.4
+71
–6.4
–71
1.61
VVID = 1.25 V
IBSHIFT = –100 µA, BOM = L
DSLP = H, VCPUSET = 0 V
–92.5
VVID = 1.25 V
–92.5
IDSHIFT = –100 µA, BOM = H
DSLP = L, VCPUSET = 0 V
VVID = 1.25 V
IFSHIFT = –100 µA, BOM = L
DSLP = H, VCPUSET = 2 V
–92.5
VCS– = 1.25 V
VCS+ = 1.25 V
VCOREFB = VRAMP = 1.23 V
VREG = VCS– = 1.25 V
IHYSSET = 0
VCS+ = 1.23 V BOM = H
IHYSSET = –10 µA
IHYSSET = –100 µA
VCS+ = 1.27 V, BOM = H
IHYSSET = –10 µA
IHYSSET = –100 µA
VCS+ = 1.23 V, BOM = L
IHYSSET = –10 µA
IHYSSET = –100 µA
VCS+ = 1.27 V, BOM = L
IHYSSET = –10 µA
IHYSSET = –100 µA
–27
–270
–18
–180
–21
–226
–14
–144
ADP3422
Typ Max
Unit
±1
µA
+10 +12
µA
+100 +111
µA
–10 –12
µA
–100 –111
µA
+8
+9.6
µA
+80 +89
µA
–8
–9.6
µA
–80 –89
µA
1.7 1.79
V
–100 –107.5 µA
VDAC
V
–100 –107.5 µA
VDAC
V
–100 –107.5 µA
VDAC
V
VCC/2
V
0.9
V
VCC/2
V
± 0.2 ± 6
mV
–0.3
µA
–0.6 –3
µA
–31.5 –36
µA
–301.5 –333
µA
–1.5 –3
µA
–21.5 –25
µA
–201.5 –223
µA
–25.5 –30
µA
–241.5 –267
µA
–17.5 –21
µA
–161.5 –179
µA
65
ns
REV. 0
–3–
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