ADS-118MC 查看數據表（PDF） - Murata Power Solutions
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ADS-118MC Datasheet PDF : 8 Pages
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®
ADS-118/118A
DYNAMIC PERFORMANCE (Cont.) MIN.
+25°C
TYP.
MAX.
S/H Acquisition Time
( to ±0.001%FSR, 10V step)
Overvoltage Recovery Time ➄
A/D Conversion Rate
—
85
90
—
200
—
5
—
—
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Delay, Falling Edge of EOC to
Output Data Valid
Delay, Falling Edge of ENABLE to
Output Data Valid
Output Coding
POWER REQUIREMENTS
+2.4
—
—
—
—
+0.4
—
—
–4
—
—
+4
—
—
20
—
—
10
Power Supply Ranges ➅
+5V Supply
–5V Supply
Power Supply Currents
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
+4.75
+5.0
+5.25
–4.75
–5.0
–5.25
—
+205
+220
—
–180
–205
—
1.8
2.1
—
—
±0.1
Footnotes:
➀ All power supplies should be on before applying a start convert pulse. All
supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.
➁ Input voltage ranges for ADS-118A is ±1.25V
➂ A 100ns wide start convert pulse is used for all production testing. For
applications requiring less than an 5MHz sampling rate, wider start convert
pulses can be used.
NOTE: The device only requires the rising edge of a start convert pulse to
operate.
0 to +70°C
MIN.
TYP. MAX.
—
85
90
—
200
—
5
—
—
–55 to +125°C
MIN. TYP.
MAX.
UNITS
—
85
—
200
5
—
90
ns
—
ns
—
MHz
+2.4
—
—
+2.4
—
—
Volts
—
—
+0.4
—
—
+0.4
Volts
—
—
–4
—
—
–4
mA
—
—
+4
—
—
+4
mA
—
—
20
—
—
20
MHz
—
—
10
—
—
10
MHz
Offset Binary
+4.75
–4.75
—
—
—
—
+5.0
+5.25
–5.0
–5.25
+205
+220
–180
–205
1.8
2.1
—
±0.1
+4.9
+5.0
+5.25
Volts
–4.9
–5.0
–5.25
Volts
—
+205
+220
mA
—
–180
–205
mA
—
1.8
2.1
Watts
—
—
±0.1 %FSR/%V
➃ Effective bits is equal to:
Full Scale Amplitude
(SNR + Distortion) – 1.76 + 20 log Actual Input Amplitude
6.02
➄ This is the time required before the A/D output data is valid once the analog input
is back within the specified range.
➅ The minimum supply voltages of +4.9V and –4.9V for ±VDD are required for
–55°C operation only. The minimum limits are +4.75V and –4.75V when
operating at +125°C
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-118
requires careful attention to pc-card layout and power
supply decoupling. The device’s analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 18, and 23) directly to
a large analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7μF tantalum
capacitors in parallel with 0.1μF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-118 achieves its specified accuracies without the
need for external calibration. If required, the device’s small
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 2a and 2b. For
operation without adjustment, tie pin 17 to analog ground.
When using this circuitry, or any similar offset and gain-
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
3. To enable the three-state outputs, connect ENABLE
(pin 17) to a logic "0" (low). To disable, connect pin 17 to
logic "1" (high). The three-state outputs are permanently
enabled in the ADS-118A.
4. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccu-
rate conversion cycle.
3
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