ADS-932MC 查看數據表（PDF） - Murata Power Solutions

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ADS-932MC

16-Bit, 2MHz Sampling A/D Converters

Murata Power Solutions 

ADS-932

®

®

THERMAL REQUIREMENTS

All DATEL sampling A/D converters are fully characterized and

specified over operating temperature (case) ranges of 0 to

+70°C and –55 to +125°C. All room-temperature (TA = +25°C)

production testing is performed without the use of heat sinks

or forced-air cooling. Thermal impedance figures for each

device are listed in their respective specification tables.

These devices do not normally require heat sinks, however,

standard precautionary design and layout procedures should

be used to ensure devices do not overheat. The ground and

power planes beneath the package, as well as all pcb signal

runs to and from the device, should be as heavy as possible to

help conduct heat away from the package. Electrically

insulating, thermally-conductive "pads" may be installed

underneath the package. Devices should be soldered to

boards rather than "socketed", and of course, minimal air flow

over the surface can greatly help reduce the package

temperature.

In more severe ambient conditions, the package/junction

temperature of a given device can be reduced dramatically

(typically 35%) by using one of DATEL's HS Series heat sinks.

See Ordering Information for the assigned part number. See

page 1-183 of the DATEL Data Acquisition Components

Catalog for more information on the HS Series. Request

DATEL Application Note AN-8, "Heat Sinks for DIP Data

Converters," or contact DATEL directly, for additional

information.

N

N+1

N+2

N+3

START

CONVERT

100ns typ.

INTERNAL S/H

20ns typ.

Hold

Acquisition Time

225ns typ.

275ns typ.

EOC

75ns typ.

45ns typ.

260ns typ.

Conversion Time

20ns typ.

OUTPUT

DATA

Data N-4 Valid

440ns typ.

Data N-3 Valid

Data N-2 Valid

Data N-1 Valid

60ns typ.

Invalid

Data

Invalid

Data

Notes: 1. Scale is approximately 50ns per division. fs = 2MHz.

2. This device has three pipeline delays. Four start convert pulses (clock cycles) must be applied for valid data

from the first conversion to appear at the output of the A/D.

3. The start convert positive pulse width must be between either 40 and 175nsec or 280 and 460nsec

(when sampling at 1MHz) to ensure proper operation. For sampling rates lower than 1MHz, the start pulse

can be wider than 460nsec, however a minimum pulse width low of 40nsec should be maintained. A 1MHz

clock with a 100nsec positive pulse width is used for all production testing.

Figure 3. ADS-932 Timing Diagram

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–110

–120

–130

–140

–150

–160

–170

0

100 200 300 400 500 600 700 800 900 1000

Frequency (kHz)

(fs = 2MHz, fin = 975kHz, Vin = –0.5dB, 16,384-point FFT)

Figure 4. FFT Analysis of ADS-932

6

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