ADSP-21267 查看數據表（PDF） - Analog Devices

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ADSP-21267

SHARC® Processor

Analog Devices 

PRELIMINARY TECHNICAL DATA

DESIGNING AN EMULATOR-COMPATIBLE DSP

BOARD (TARGET)

The Analog Devices family of emulators are tools that every

DSP developer needs to test and debug hardware and software

systems. Analog Devices has supplied an IEEE 1149.1 JTAG

Test Access Port (TAP) on each JTAG DSP. Nonintrusive in-

circuit emulation is assured by the use of the processor’s JTAG

interface—the emulator does not affect target system loading or

timing. The emulator uses the TAP to access the internal fea-

tures of the DSP, allowing the developer to load code, set

breakpoints, observe variables, observe memory, and examine

registers. The DSP must be halted to send data and commands,

but once an operation has been completed by the emulator, the

DSP system is set running at full speed with no impact on sys-

tem timing.

To use these emulators, the target board must include a header

that connects the DSP’s JTAG port to the emulator.

For details on target board design issues including mechanical

layout, single processor connections, multiprocessor scan

chains, signal buffering, signal termination, and emulator pod

logic, see the EE-68: Analog Devices TAG Emulation Technical

Reference on the Analog Devices website (www.analog.com).

Use site search on “EE-68.” This document is updated regularly

to keep pace with improvements to emulator support.

ADDITIONAL INFORMATION

This data sheet provides a general overview of the ADSP-21267

architecture and functionality. For detailed information on the

ADSP-2126x Family core architecture and instruction set, refer

to the ADSP-2126x DSP Core Manual and the ADSP-21160

SHARC DSP Instruction Set Reference.

ADSP-21267

Rev. PrA | Page 9 of 44 | January 2004

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