GS8170LW18C-333 查看數據表（PDF） - Giga Semiconductor
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GS8170LW18C-333 Datasheet PDF : 39 Pages
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Preliminary
GS8170LW18/36/72C-333/300/250
Background
The central characteristics of ΣRAMs are that they are extremely fast and consume very little power. Because both operating and
interface power is low, ΣRAMs can be implemented in a wide (x72) configuration, providing very high single package bandwidth
(in excess of 20 Gb/s in ordinary pipelined configuration) and very low random access latency (5 ns). The use of very low voltage
circuits in the core and 1.8 V or 1.5 V interface voltages allow the speed, power and density performance of ΣRAMs.
The ΣRAM family of pinouts has been designed to support a number of different common read and write protocols. The following
timing diagrams provide a quick comparison between single data rate read and write protocols options available in the context of
the ΣRAM standard. This particular datasheet covers the single data rate (non-DDR), Late Write (LW) ΣRAM.
Rev: 1.00f 6/2002
7/39
© 2002, Giga Semiconductor, Inc.
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
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