GS8170LW18C-333I 查看數據表（PDF） - Giga Semiconductor

零件编号

产品描述 (功能)

生产厂家

GS8170LW18C-333I

18Mb Σ1x1 Late Write SigmaRAM™ SRAM

Giga Semiconductor 

Preliminary

GS8170LW18/36/72C-333/300/250

Common I/O SigmaRAM Family Mode Comparison—EW vs. LW vs. DLW

Σ 1x1Ef (Early Write - Flow Through Read)

CK

Address A

B

C

D

E

F

Control R

X

W

R

X

W

DQ

QA

DC

QD

DF

Σ 1x1Lf (Late Write - Flow Through Read)

CK

Address A

B

C

D

E

F

Control R

W

R

W

R

W

DQ

QA

DB

QC

DD

QE

DF

Σ 1x1Ep (Early Write - Pipelined Read)

CK

Address A

Control R

DQ

B

C

D

E

X

X

W

R

QA

DD

F

R

QE

CQ

Σ 1x1Lp (Late Write - Pipelined Read)

CK

Address A

Control R

B

C

D

E

F

Z

W

R

X

W

QA

DC

QD

DF

CQ

Σ 1x1Dp (Double Late Write - Pipelined Read)

CK

Address A

Control R

B

C

W

R

QA

D

E

W

R

DB

QC

F

W

DD

QE

CQ

Note: R = Read, W = Write, Z = Deselect

Rev: 1.00f 6/2002

8/39

© 2002, Giga Semiconductor, Inc.

Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.

Share Link: