AK4382VT 查看數據表（PDF） - Asahi Kasei Microdevices
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AK4382VT Datasheet PDF : 21 Pages
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ASAHI KASEI
[AK4382]
MCLK
512fs
768fs
256fs
384fs
128fs
192fs
Sampling Speed
Normal
Double
Quad
Table 5. Sampling Speed (Auto Setting Mode)
LRCK
fs
32.0kHz
44.1kHz
48.0kHz
88.2kHz
96.0kHz
176.4kHz
192.0kHz
128fs
-
-
-
-
-
22.5792
24.5760
192fs
-
-
-
-
-
33.8688
36.8640
MCLK (MHz)
256fs
384fs
-
-
-
-
-
-
22.5792 33.8688
24.5760 36.8640
-
-
-
-
512fs
16.3840
22.5792
24.5760
-
-
-
-
768fs
24.5760
33.8688
36.8640
-
-
-
-
Sampling Speed
Normal
Double
Quad
Table 6. System Clock Example (Auto Setting Mode)
n Audio Serial Interface Format
Data is shifted in via the SDTI pin using BICK and LRCK inputs. The DIF0-2 as shown in Table 7 can select five serial
data modes. In all modes the serial data is MSB-first, 2’s compliment format and is latched on the rising edge of BICK.
Mode 2 can be used for 16/20 MSB justified formats by zeroing the unused LSBs.
Mode
0
1
2
3
4
DIF2
0
0
0
0
1
DIF1
0
0
1
1
0
DIF0
0
1
0
1
0
SDTI Format
16bit LSB Justified
20bit LSB Justified
24bit MSB Justified
24bit I2S Compatible
24bit LSB Justified
BICK
³32fs
³40fs
³48fs
³48fs
³48fs
Figure
Figure 1
Figure 2
Figure 3
Figure 4
Figure 2
Default
Table 7. Audio Data Formats
MS0034-E-00
- 10 -
2000/7
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