IS61LV25616-7LQ 查看數據表（PDF） - Integrated Silicon Solution

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IS61LV25616-7LQ

256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

Integrated Silicon Solution 

IS61LV25616

ISSI ®

AC WAVEFORMS

WRITE CYCLE NO. 1 (CE Controlled, OE is HIGH or LOW) (1 )

t WC

ADDRESS

t SA

CE

WE

VALID ADDRESS

t SCE

t HA

t AW

t PWE1

t PWE2

t PBW

UB, LB

DOUT

DATA UNDEFINED

t HZWE

HIGH-Z

t LZWE

t SD

t HD

DIN

DATAIN VALID

UB_CEWR1.eps

Notes:

1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least one of

the LB and UB inputs being in the LOW state.

2. WRITE = (CE) [ (LB) = (UB) ] (WE).

8

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. B

09/29/00

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