IS61SF51218D 查看數據表（PDF） - Integrated Silicon Solution

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IS61SF51218D

256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS FLOW-THROUGH STATIC RAM

Integrated Silicon Solution 

IS61SF25632T/D IS61LF25632T/D

IS61SF25636T/D IS61LF25636T/D

IS61SF51218T/D IS61LF51218T/D

ISSI ®

WRITE CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)

Symbol Parameter

tKC

Cycle Time

tKH

Clock High Pulse Width

tKL

Clock Low Pulse Width

tAS

Address Setup Time

tSS

Address Status Setup Time

tWS

Write Setup Time

tDS

Data In Setup Time

tCES

Chip Enable Setup Time

tAVS

Address Advance Setup Time

tAH

Address Hold Time

tSH

Address Status Hold Time

tDH

Data In Hold Time

tWH

Write Hold Time

tCEH

Chip Enable Hold Time

tAVH

Address Advance Hold Time

*This speed available only in SF version

-8*

Min. Max.

9.5 —

3.0 —

3.0 —

1.8 —

1.8 —

1.8 —

1.8 —

1.8 —

1.8 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

-8.5

Min. Max.

10 —

3.0 —

3.0 —

1.8 —

1.8 —

1.8 —

1.8 —

1.8 —

1.8 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

-9

Min. Max.

15 —

4.0 —

4.0 —

2—

2—

2—

2—

2—

2—

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

-10

Min. Max.

15 —

4.0 —

4.0 —

2—

2—

2—

2—

2—

2—

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

Unit

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

Integrated Silicon Solution, Inc. — 1-800-379-4774

15

PRELIMINARY INFORMATION Rev. 00A

04/17/01

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