AM79C900 查看數據表（PDF） - Advanced Micro Devices

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AM79C900

Serial Interface Adapter (SIA)

Advanced Micro Devices 

FUNCTIONAL DESCRIPTION

The Am7992B serial interface adapter (SIA) has three

basic functions. It is a Manchester encoder/line driver

in the transmit path, a Manchester decoder with noise

filtering and quick lock-on characteristics in the receive

path, and a signal detector/converter (10 MHz differen-

tial to TTL) in the collision path. In addition, the SIA pro-

vides the interface between the TTL logic environment

of the Local Area Network Controller for Ethernet

(LANCE) and the differential signaling environment in

the transceiver cable.

Transmit Path

The transmit section encodes separate clock and NRZ

data input signals meeting the setup and hold time to

TCLK at TENA and TX into a standard Manchester II

serial bit stream. The transmit outputs (Transmit+/

Transmit–) are designed to operate into terminated

transmission lines. When operating into a 78 Ω termi-

nated transmission line, signaling meets the required

output levels and skew for IEEE 802.3/Ethernet/

Cheapernet.

TX

TENA

Manchester

Encoder

DO±

TCLK

OSC

I

03378I-4

Figure 1. Transmit Section

Transmitter Timing and Operation

A 20 MHz fundamental mode crystal oscillator provides

the basic timing reference in the SIA. It is divided by two

to create the Transmit Clock reference (TCLK). Both

20 MHz and 10 MHz clocks are fed into the Manchester

Encoder to generate the transitions in the encoded

data stream. The 10 MHz clock, TCLK, is used by the

SIA to internally synchronize Transmit (TX) data and

Transmit Enable (TENA). TCLK is also used as a stable

bit rate clock by the receive section of the SIA and by

other devices in the system (the Am7990 LANCE uses

TCLK to drive its internal state machine). The oscillator

may use an external 0.005% crystal or an external

TTL-level input as a reference, which will achieve a

transmit accuracy of 0.01% (no external adjustments

are required).

Transmission is enabled when TENA is activated. As

long as TENA remains HIGH, signals at TX will be en-

coded as Manchester and will appear at Transmit+ and

Transmit–. When TENA goes LOW, the differential

transmit outputs go to one of two idle states determined

by the circuit configuration of TSEL:

TSEL HIGH: The idle state of Transmit± yields “zero”

differential to operate transformer-coupled loads (see

Figure 2, Transmitter Timing—End of Transmission

waveform diagram and Typical Performance Curve

diagram).

TSEL LOW: In this idle state, Transmit+ is positive to

Transmit– (logical HIGH) (see figures and diagrams as

referenced above).

The End of Transmission—Return to Zero is deter-

mined by the external RX network at TSEL and by the

load at Transmit±.

TSEL

PIN 5

TSEL

PIN 5

VCC

R1 510

C1

680 pF

C2

20 pF

R2 3K

A. TSEL LOW

B. TSEL HIGH

03378I-5

Figure 2. Transmit Mode Select (TSEL) Connection

03378I-6

6

Am7992B

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