AN201 查看數據表（PDF） - Vishay Semiconductors

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AN201

High-Performance Multiplexing with the DG408

Vishay Semiconductors 

AN201

Vishay Siliconix

n-Channel

p-Channel

Silicon

S Gate D

Silicon

S Gate D

V–

ÉÉÉ

ÉÉÉ

V+

p+

n+

n+

p+

n+

p+

p+

n+

p-Well

p+ Buried Layer

Expitaxial Layer (n–)

n– Substrate

Thermo

Couple

Strain

Gauge

Reference

Voltage

FIGURE 5. Cross Section of a High Voltage Silicon Gate CMOS Device

Multiplexer

rDS(on)

ID(on)

IBIAS

Amplifier

+

–

Link

A/D

Converter

Processor

DG408

Pump

Demultiplexer

Link

D/A

Converter

Meter

DG408

FIGURE 6. Typical Data Aquisition System

Figure 6 shows a typical data multiplexing system. Because

the multiplexer feeds a very high impedance, its input offset is

a function of its on-resistance and the on-state leakage of the

switch plus the amplifier bias current.

www.vishay.com

4

VOFFSET = rDS(on) (ID(on) + I(BIAS))

For the DG408/409 typical specifications, this offset will be

VOFFSET = 100 (500 pA + 30 pA) = 53 nV

Document Number: 70600

05-Aug -99

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