AP3720MTR-G1 查看數據表（PDF） - BCD Semiconductor

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AP3720MTR-G1

CURRENT MODE PWM CONTROLLER FOR BJT

BCD Semiconductor 

Preliminary Datasheet

CURRENT MODE PWM CONTROLLER FOR BJT

AP3720

Operation Description (Continued)

Start Sequence

When the VCC capacitor reaches the UVLO(on) level

(typically 20V), the controller runs. At this time,

VCC capacitor supplies the controller and the

auxiliary supply takes over before VCC collapses

below UVLO(off).

Soft Start

The internal soft start function is activated at start-up

with a duration of 2ms (typical). The current sense

compensation starts from 1.0V and slowly decreases

to zero at the end of the 2ms duration. This function

is activated at each auto-restart attempt due to OLP or

TSD condition. The feature also helps minimize

output overshoot and prevents saturation of

transformer during start-up.

FB Pin Operation

The AP3720 can automatically adjust the operating

mode according to the loading condition. The voltage

of FB controls the mode of operation in one of the

three modes: burst mode, frequency-drop mode

(20kHz) and normal mode (65kHz). To prevent

saturation of transformer and achieve good transient

load performance, the switch from frequency-drop

mode to normal mode occurs with no delay time and

that from normal mode to frequency-drop mode

occurs with 64ms delay time when the load condition

changes.

Burst Mode Operation

At zero load or light load condition, majority of the

power dissipation is in proportion to the number of

switch events within a fixed period of time. To

reduce the loss in this situation, the device enters

burst mode control which makes some switching

cycle skip when VFB drops below the burst mode

threshold level.

Frequency-drop Mode (20kHz)

When the output power drops below a specific level,

the device enters the frequency-drop mode and the

typical operating frequency is 20kHz. In this mode,

the system efficiency at specific load will improve

obviously.

Normal Mode (65kHz)

At the higher load, the device operates in normal

mode and the frequency is 65kHz (typical).

Cycle-by-Cycle Current Limit

The cycle terminates when the CS voltage exceeds

1.074V.

The AP3720 operates as a current mode controller,

whereby output switch conduction is initiated by the

oscillator and terminated when the peak inductor

current reaches the threshold level established by VFB.

The inductor current is converted to a voltage by

inserting the ground referenced sense resistor RS in

series with the emitter of the power transistor.

When the power supply output is overload or the

control loop is open, the current sense comparator

threshold will be internally clamped to about 1.074V.

Therefore the maximum peak inductor current is:

I PK (max)

=

1.074 − k ∗VLINE

RS

( k=0.0444 )

Leading Edge Blanking (LEB)

At the instant the power transistor is turned on, there

usually exists a high current spike through the BJT,

caused by primary-side capacitance and

secondary-side rectifier reverse recovery. Excessive

voltage across the RS can lead to incorrect feedback

operation in the current mode PWM control. To

counter this effect, the AP3720 employs a leading

edge blanking (LEB) circuit. This circuit inhibits the

PWM comparator for a short time (tLEB) after the BJT

is turn on.

Line Compensation

The AP3720 has an adjustable line compensation so

that achieves constant output power limit over the

universal input voltage range.

Drive Current Control

The AP3720 drive current is programmable through

an external resistor to GND (see Figure 4).

Jul. 2009 Rev. 1. 0

BCD Semiconductor Manufacturing Limited

9

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