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24LLC02TS8 查看數據表(PDF) - CERAMATE TECHNICAL

零件编号
产品描述 (功能)
生产厂家
24LLC02TS8
Ceramate
CERAMATE TECHNICAL Ceramate
24LLC02TS8 Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
24LLC02
2K-bit Serial EEPROM for Low Power
V CC WP SCL SDA
24LLC02
A0 A1 A2 V SS
NOTE: The 24LLC02 is available in 8-pin DIP, SOP,TSSOP package.
Figure 1-2. Pin Assignment Diagram
Name
Table 1-1. 24LLC02 Pin Descriptions
Type
Description
A0, A1, A2
V SS
SDA
SCL
WP
V CC
Input
I/O
Input
Input
Input pins for device address selection. To configure a device address,
these pins should be connected to the VCC or VSS of the device.
These pins are internally pulled down to VSS .
Ground pin.
Bi-directional data pin for the I2C-bus serial data interface. Schmitt
trigger input and open-drain output. An external pull-up resistor must
be connected to VCC. Typical values for this pull-up resistor are 4.7 k
(100 kHz) and 1 k (400 kHz).
Schmitt trigger input pin for serial clock input.
Input pin for hardware write protection control. If you tie this pin to VCC,
the write function is disabled to protect previously written data in the
entire memory; if you tie it to VSS , the write function is enabled.
This pin is internally pulled down to VSS .
Single power supply.
NOTE : See the following page for diagrams of pin circuit types 1, 2, and 3.
Circuit
Type
1
3
2
1
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN, R.O.C
Tel:886-3-3529445
Fax:886 -3 -3521052
Page 3 of 19
Email: server@ceramate.com.tw
Http: www.ceramate.com.tw
Rev 1.2 May 6,2002

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